d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/*
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * CDDL HEADER START
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw *
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * The contents of this file are subject to the terms of the
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * Common Development and Distribution License (the "License").
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * You may not use this file except in compliance with the License.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw *
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * or http://www.opensolaris.org/os/licensing.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * See the License for the specific language governing permissions
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * and limitations under the License.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw *
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * When distributing Covered Code, include this CDDL HEADER in each
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * If applicable, add the following below this CDDL HEADER, with the
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * fields enclosed by brackets "[]" replaced with your own identifying
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * information: Portions Copyright [yyyy] [name of copyright owner]
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw *
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * CDDL HEADER END
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/*
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * Copyright (C) 2003-2005 Chelsio Communications. All rights reserved.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#pragma ident "%Z%%M% %I% %E% SMI"
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* Driver for Vitesse VSC7326 (Schaumburg) MAC */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#include "gmac.h"
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#include "elmer0.h"
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#include "vsc7326_reg.h"
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwFILE_IDENT("@(#) $Id: vsc7326.c,v 1.17 2005/10/29 05:42:36 sbardone Exp $");
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* Update fast changing statistics every 15 seconds */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define STATS_TICK_SECS 15
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* 30 minutes for full statistics update */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define MAJOR_UPDATE_TICKS (1800 / STATS_TICK_SECS)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define MAX_MTU 9600
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstruct init_table {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 addr;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 data;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw};
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstruct _cmac_instance {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 index;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 ticks;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw};
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define INITBLOCK_SLEEP 0xffffffff
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic void vsc_read(adapter_t *adapter, u32 addr, u32 *val)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 status, vlo, vhi;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int i;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw MAC_LOCK(adapter->mac_lock);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) t1_tpi_read(adapter, (addr << 2) + 4, &vlo);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw i = 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw do {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) t1_tpi_read(adapter, (REG_LOCAL_STATUS << 2) + 4, &vlo);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) t1_tpi_read(adapter, REG_LOCAL_STATUS << 2, &vhi);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw status = (vhi << 16) | vlo;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw i++;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw } while (((status & 1) == 0) && (i < 50));
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (i == 50)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw CH_ERR("Invalid tpi read from MAC, breaking loop.\n");
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) t1_tpi_read(adapter, (REG_LOCAL_DATA << 2) + 4, &vlo);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) t1_tpi_read(adapter, REG_LOCAL_DATA << 2, &vhi);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw *val = (vhi << 16) | vlo;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* CH_ERR("rd: block: 0x%x sublock: 0x%x reg: 0x%x data: 0x%x\n",
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw ((addr&0xe000)>>13), ((addr&0x1e00)>>9),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw ((addr&0x01fe)>>1), *val); */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw MAC_UNLOCK(adapter->mac_lock);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic void vsc_write(adapter_t *adapter, u32 addr, u32 data)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw MAC_LOCK(adapter->mac_lock);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) t1_tpi_write(adapter, (addr << 2) + 4, data & 0xFFFF);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) t1_tpi_write(adapter, addr << 2, (data >> 16) & 0xFFFF);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* CH_ERR("wr: block: 0x%x sublock: 0x%x reg: 0x%x data: 0x%x\n",
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw ((addr&0xe000)>>13), ((addr&0x1e00)>>9),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw ((addr&0x01fe)>>1), data); */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw MAC_UNLOCK(adapter->mac_lock);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* Hard reset the MAC. This wipes out *all* configuration. */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic void vsc7326_full_reset(adapter_t* adapter)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 val;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 result = 0xffff;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) t1_tpi_read(adapter, A_ELMER0_GPO, &val);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw val &= ~1;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) t1_tpi_write(adapter, A_ELMER0_GPO, val);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_US(2);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw val |= 0x1; /* Enable mac MAC itself */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw val |= 0x800; /* Turn off the red LED */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) t1_tpi_write(adapter, A_ELMER0_GPO, val);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_MS(1);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(adapter, REG_SW_RESET, 0x80000001);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw do {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_MS(1);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(adapter, REG_SW_RESET, &result);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw } while (result != 0x0);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic struct init_table vsc7326_reset[] = {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_IFACE_MODE, 0x00000000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_CRC_CFG, 0x00000020 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_PLL_CLK_SPEED, 0x00050c00 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_PLL_CLK_SPEED, 0x00050c00 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_MSCH, 0x00002f14 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_SPI4_MISC, 0x00040409 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_SPI4_DESKEW, 0x00080000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_SPI4_ING_SETUP2, 0x08080004 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_SPI4_ING_SETUP0, 0x04111004 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_SPI4_EGR_SETUP0, 0x80001a04 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_SPI4_ING_SETUP1, 0x02010000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_AGE_INC(0), 0x00000000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_AGE_INC(1), 0x00000000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_ING_CONTROL, 0x0a200011 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_EGR_CONTROL, 0xa0010091 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw};
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic struct init_table vsc7326_portinit[4][22] = {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { /* Port 0 */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* FIFO setup */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DBG(0), 0x000004f0 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_HDX(0), 0x00073101 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(0,0), 0x00000022 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(1,0), 0x00000022 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TOP_BOTTOM(0,0), 0x003f0000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TOP_BOTTOM(1,0), 0x00120000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_HIGH_LOW_WM(0,0), 0x07460757 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_HIGH_LOW_WM(1,0), 0x01a01fff },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_CT_THRHLD(0,0), 0x00000000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_CT_THRHLD(1,0), 0x00000000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_BUCKE(0), 0x0002ffff },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_BUCKI(0), 0x0002ffff },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(0,0), 0x00000020 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(1,0), 0x00000020 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* Port config */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_MAX_LEN(0), 0x00002710 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_PORT_FAIL(0), 0x00000002 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_NORMALIZER(0), 0x00000a64 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DENORM(0), 0x00000010 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_STICK_BIT(0), 0x03baa370 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DEV_SETUP(0), 0x00000083 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DEV_SETUP(0), 0x00000082 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_MODE_CFG(0), 0x0200259f },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { /* Port 1 */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* FIFO setup */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DBG(1), 0x000004f0 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_HDX(1), 0x00073101 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(0,1), 0x00000022 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(1,1), 0x00000022 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TOP_BOTTOM(0,1), 0x007e003f },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TOP_BOTTOM(1,1), 0x00240012 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_HIGH_LOW_WM(0,1), 0x07460757 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_HIGH_LOW_WM(1,1), 0x01a01fff },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_CT_THRHLD(0,1), 0x00000000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_CT_THRHLD(1,1), 0x00000000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_BUCKE(1), 0x0002ffff },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_BUCKI(1), 0x0002ffff },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(0,1), 0x00000020 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(1,1), 0x00000020 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* Port config */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_MAX_LEN(1), 0x00002710 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_PORT_FAIL(1), 0x00000002 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_NORMALIZER(1), 0x00000a64 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DENORM(1), 0x00000010 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_STICK_BIT(1), 0x03baa370 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DEV_SETUP(1), 0x00000083 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DEV_SETUP(1), 0x00000082 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_MODE_CFG(1), 0x0200259f },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { /* Port 2 */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* FIFO setup */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DBG(2), 0x000004f0 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_HDX(2), 0x00073101 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(0,2), 0x00000022 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(1,2), 0x00000022 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TOP_BOTTOM(0,2), 0x00bd007e },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TOP_BOTTOM(1,2), 0x00360024 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_HIGH_LOW_WM(0,2), 0x07460757 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_HIGH_LOW_WM(1,2), 0x01a01fff },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_CT_THRHLD(0,2), 0x00000000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_CT_THRHLD(1,2), 0x00000000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_BUCKE(2), 0x0002ffff },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_BUCKI(2), 0x0002ffff },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(0,2), 0x00000020 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(1,2), 0x00000020 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* Port config */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_MAX_LEN(2), 0x00002710 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_PORT_FAIL(2), 0x00000002 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_NORMALIZER(2), 0x00000a64 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DENORM(2), 0x00000010 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_STICK_BIT(2), 0x03baa370 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DEV_SETUP(2), 0x00000083 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DEV_SETUP(2), 0x00000082 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_MODE_CFG(2), 0x0200259f },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { /* Port 3 */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* FIFO setup */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DBG(3), 0x000004f0 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_HDX(3), 0x00073101 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(0,3), 0x00000022 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(1,3), 0x00000022 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TOP_BOTTOM(0,3), 0x00fc00bd },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TOP_BOTTOM(1,3), 0x00480036 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_HIGH_LOW_WM(0,3), 0x07460757 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_HIGH_LOW_WM(1,3), 0x01a01fff },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_CT_THRHLD(0,3), 0x00000000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_CT_THRHLD(1,3), 0x00000000 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_BUCKE(3), 0x0002ffff },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_BUCKI(3), 0x0002ffff },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(0,3), 0x00000020 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_TEST(1,3), 0x00000020 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* Port config */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_MAX_LEN(3), 0x00002710 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_PORT_FAIL(3), 0x00000002 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_NORMALIZER(3), 0x00000a64 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DENORM(3), 0x00000010 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_STICK_BIT(3), 0x03baa370 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DEV_SETUP(3), 0x00000083 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_DEV_SETUP(3), 0x00000082 },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw { REG_MODE_CFG(3), 0x0200259f },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw },
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw};
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic void run_table(adapter_t *adapter, struct init_table *ib, int len)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int i;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw for (i = 0; i < len; i++) {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (ib[i].addr == INITBLOCK_SLEEP) {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_US( ib[i].data );
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw CH_ERR("sleep %d us\n",ib[i].data);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw } else {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write( adapter, ib[i].addr, ib[i].data );
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw }
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw }
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int bist_rd(adapter_t *adapter, int moduleid, int address)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int data=0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 result=0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if( (address != 0x0) &&
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (address != 0x1) &&
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (address != 0x2) &&
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (address != 0xd) &&
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (address != 0xe))
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw CH_ERR("No bist address: 0x%x\n", address);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw data = ((0x00 << 24) | ((address & 0xff) << 16) | (0x00 << 8) |
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw ((moduleid & 0xff) << 0));
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(adapter, REG_RAM_BIST_CMD, data);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_US(10);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(adapter, REG_RAM_BIST_RESULT, &result);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if((result & (1<<9)) != 0x0)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw CH_ERR("Still in bist read: 0x%x\n", result);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw else if((result & (1<<8)) != 0x0)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw CH_ERR("bist read error: 0x%x\n", result);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return(result & 0xff);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int bist_wr(adapter_t *adapter, int moduleid, int address, int value)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int data=0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 result=0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if( (address != 0x0) &&
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (address != 0x1) &&
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (address != 0x2) &&
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (address != 0xd) &&
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (address != 0xe))
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw CH_ERR("No bist address: 0x%x\n", address);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if( value>255 )
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw CH_ERR("Suspicious write out of range value: 0x%x\n", value);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw data = ((0x01 << 24) | ((address & 0xff) << 16) | (value << 8) |
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw ((moduleid & 0xff) << 0));
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(adapter, REG_RAM_BIST_CMD, data);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_US(5);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(adapter, REG_RAM_BIST_CMD, &result);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if((result & (1<<27)) != 0x0)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw CH_ERR("Still in bist write: 0x%x\n", result);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw else if((result & (1<<26)) != 0x0)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw CH_ERR("bist write error: 0x%x\n", result);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return(0);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int run_bist(adapter_t *adapter, int moduleid)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /*run bist*/
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) bist_wr(adapter,moduleid, 0x00, 0x02);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) bist_wr(adapter,moduleid, 0x01, 0x01);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return(0);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int check_bist(adapter_t *adapter, int moduleid)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int result=0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int column=0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /*check bist*/
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw result = bist_rd(adapter,moduleid, 0x02);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw column = ((bist_rd(adapter,moduleid, 0x0e)<<8) +
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (bist_rd(adapter,moduleid, 0x0d)));
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if ((result & 3) != 0x3)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw CH_ERR("Result: 0x%x BIST error in ram %d, column: 0x%04x\n",
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw result, moduleid, column);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return(0);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int enable_mem(adapter_t *adapter, int moduleid)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /*enable mem*/
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) bist_wr(adapter,moduleid, 0x00, 0x00);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return(0);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int run_bist_all(adapter_t *adapter)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int port=0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 val=0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(adapter, REG_MEM_BIST, 0x5);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(adapter, REG_MEM_BIST, &val);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw for(port=0; port<12; port++){
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(adapter, REG_DEV_SETUP(port), 0x0);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw }
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_US(300);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(adapter, REG_SPI4_MISC, 0x00040409);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_US(300);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) run_bist(adapter,13);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) run_bist(adapter,14);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) run_bist(adapter,20);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) run_bist(adapter,21);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_MS(200);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) check_bist(adapter,13);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) check_bist(adapter,14);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) check_bist(adapter,20);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) check_bist(adapter,21);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_US(100);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) enable_mem(adapter,13);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) enable_mem(adapter,14);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) enable_mem(adapter,20);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) enable_mem(adapter,21);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_US(300);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(adapter, REG_SPI4_MISC, 0x60040400);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_US(300);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw for(port=0; port<12; port++){
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(adapter, REG_DEV_SETUP(port), 0x1);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw }
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_US(300);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(adapter, REG_MEM_BIST, 0x0);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_MS(10);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return(0);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* ARGSUSED */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int mac_intr_handler(struct cmac *mac)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* ARGSUSED */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int mac_intr_enable(struct cmac *mac)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* ARGSUSED */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int mac_intr_disable(struct cmac *mac)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* ARGSUSED */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int mac_intr_clear(struct cmac *mac)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* Expect MAC address to be in network byte order. */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int mac_set_address(struct cmac* mac, u8 addr[6])
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 val;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int port = mac->instance->index;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_MAC_LOW_ADDR(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (addr[3] << 16) | (addr[4] << 8) | addr[5]);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_MAC_HIGH_ADDR(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (addr[0] << 16) | (addr[1] << 8) | addr[2]);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(mac->adapter, REG_ING_FFILT_UM_EN, &val);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw val &= ~0xf0000000;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_ING_FFILT_UM_EN, val | (port << 28));
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_ING_FFILT_MASK0,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw 0xffff0000 | (addr[4] << 8) | addr[5]);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_ING_FFILT_MASK1,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw 0xffff0000 | (addr[2] << 8) | addr[3]);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_ING_FFILT_MASK2,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw 0xffff0000 | (addr[0] << 8) | addr[1]);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int mac_get_address(struct cmac *mac, u8 addr[6])
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 addr_lo, addr_hi;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int port = mac->instance->index;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(mac->adapter, REG_MAC_LOW_ADDR(port), &addr_lo);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(mac->adapter, REG_MAC_HIGH_ADDR(port), &addr_hi);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw addr[0] = (u8) (addr_hi >> 16);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw addr[1] = (u8) (addr_hi >> 8);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw addr[2] = (u8) addr_hi;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw addr[3] = (u8) (addr_lo >> 16);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw addr[4] = (u8) (addr_lo >> 8);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw addr[5] = (u8) addr_lo;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* This is intended to reset a port, not the whole MAC */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int mac_reset(struct cmac *mac)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int index = mac->instance->index;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw run_table(mac->adapter, vsc7326_portinit[index],
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DIMOF(vsc7326_portinit[index]));
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int mac_set_rx_mode(struct cmac *mac, struct t1_rx_mode *rm)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 v;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int port = mac->instance->index;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(mac->adapter, REG_ING_FFILT_UM_EN, &v);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v |= 1 << 12;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (t1_rx_mode_promisc(rm))
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v &= ~(1 << (port + 16));
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw else
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v |= 1 << (port + 16);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_ING_FFILT_UM_EN, v);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int mac_set_mtu(struct cmac *mac, int mtu)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int port = mac->instance->index;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (mtu > MAX_MTU)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return -EINVAL;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* max_len includes header and FCS */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_MAX_LEN(port), mtu + 14 + 4);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int fc)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 v;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int enable, port = mac->instance->index;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (speed >= 0 && speed != SPEED_10 && speed != SPEED_100 &&
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw speed != SPEED_1000)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return -1;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (duplex > 0 && duplex != DUPLEX_FULL)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return -1;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (speed >= 0) {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(mac->adapter, REG_MODE_CFG(port), &v);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw enable = v & 3; /* save tx/rx enables */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v &= ~0xf;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v |= 4; /* full duplex */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (speed == SPEED_1000)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v |= 8; /* GigE */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw enable |= v;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_MODE_CFG(port), v);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (speed == SPEED_1000)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v = 0x82;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw else if (speed == SPEED_100)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v = 0x84;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw else /* SPEED_10 */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v = 0x86;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_DEV_SETUP(port), v | 1); /* reset */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_DEV_SETUP(port), v);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(mac->adapter, REG_DBG(port), &v);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v &= ~0xff00;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (speed == SPEED_1000)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v |= 0x400;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw else if (speed == SPEED_100)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v |= 0x2000;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw else /* SPEED_10 */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v |= 0xff00;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_DBG(port), v);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_TX_IFG(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw speed == SPEED_1000 ? 5 : 0x11);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (duplex == DUPLEX_HALF)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw enable = 0x0; /* 100 or 10 */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw else if (speed == SPEED_1000)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw enable = 0xc;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw else /* SPEED_100 or 10 */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw enable = 0x4;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw enable |= 0x9 << 10; /* IFG1 */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw enable |= 0x6 << 6; /* IFG2 */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw enable |= 0x1 << 4; /* VLAN */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw enable |= 0x3; /* RX/TX EN */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_MODE_CFG(port), enable);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw }
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(mac->adapter, REG_PAUSE_CFG(port), &v);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v &= 0xfff0ffff;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v |= 0x20000; /* xon/xoff */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (fc & PAUSE_RX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v |= 0x40000;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (fc & PAUSE_TX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v |= 0x80000;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (fc == (PAUSE_RX | PAUSE_TX))
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw v |= 0x10000;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_PAUSE_CFG(port), v);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int mac_enable(struct cmac *mac, int which)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 val;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int port = mac->instance->index;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(mac->adapter, REG_MODE_CFG(port), &val);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (which & MAC_DIRECTION_RX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw val |= 0x2;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (which & MAC_DIRECTION_TX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw val |= 1;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_MODE_CFG(port), val);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int mac_disable(struct cmac *mac, int which)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 val;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int i, port = mac->instance->index;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* Reset the port */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) mac_reset(mac);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(mac->adapter, REG_MODE_CFG(port), &val);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (which & MAC_DIRECTION_RX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw val &= ~0x2;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (which & MAC_DIRECTION_TX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw val &= ~0x1;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, REG_MODE_CFG(port), val);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(mac->adapter, REG_MODE_CFG(port), &val);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* Clear stats */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw for (i = 0; i <= 0x3a; ++i)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_write(mac->adapter, CRA(4, port, i), 0);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* Clear sofware counters */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw memset(&mac->stats, 0, sizeof(struct cmac_statistics));
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic void rmon_update(struct cmac *mac, unsigned int addr, u64 *stat)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 v, lo;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc_read(mac->adapter, addr, &v);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw lo = *stat;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw *stat = *stat - lo + v;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (v == 0)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (v < lo)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw *stat += (1ULL << 32);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic void port_stats_update(struct cmac *mac)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int port = mac->instance->index;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* Rx stats */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_OK_BYTES(port), &mac->stats.RxOctetsOK);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_BAD_BYTES(port), &mac->stats.RxOctetsBad);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_UNICAST(port), &mac->stats.RxUnicastFramesOK);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_MULTICAST(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw &mac->stats.RxMulticastFramesOK);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_BROADCAST(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw &mac->stats.RxBroadcastFramesOK);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_CRC(port), &mac->stats.RxFCSErrors);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_ALIGNMENT(port), &mac->stats.RxAlignErrors);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_OVERSIZE(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw &mac->stats.RxFrameTooLongErrors);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_PAUSE(port), &mac->stats.RxPauseFrames);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_JABBERS(port), &mac->stats.RxJabberErrors);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_FRAGMENTS(port), &mac->stats.RxRuntErrors);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_UNDERSIZE(port), &mac->stats.RxRuntErrors);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_SYMBOL_CARRIER(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw &mac->stats.RxSymbolErrors);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_SIZE_1519_TO_MAX(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw &mac->stats.RxJumboFramesOK);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw /* Tx stats (skip collision stats as we are full-duplex only) */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_TX_OK_BYTES(port), &mac->stats.TxOctetsOK);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_TX_UNICAST(port), &mac->stats.TxUnicastFramesOK);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_TX_MULTICAST(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw &mac->stats.TxMulticastFramesOK);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_TX_BROADCAST(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw &mac->stats.TxBroadcastFramesOK);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_TX_PAUSE(port), &mac->stats.TxPauseFrames);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_TX_UNDERRUN(port), &mac->stats.TxUnderrun);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_TX_SIZE_1519_TO_MAX(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw &mac->stats.TxJumboFramesOK);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/*
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * This function is called periodically to accumulate the current values of the
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * RMON counters into the port statistics. Since the counters are only 32 bits
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * some of them can overflow in less than a minute at GigE speeds, so this
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * function should be called every 30 seconds or so.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw *
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * To cut down on reading costs we update only the octet counters at each tick
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * and do a full update at major ticks, which can be every 30 minutes or more.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic const struct cmac_statistics *mac_update_statistics(struct cmac *mac,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int flag)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (flag == MAC_STATS_UPDATE_FULL ||
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac->instance->ticks >= MAJOR_UPDATE_TICKS) {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw port_stats_update(mac);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac->instance->ticks = 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw } else {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int port = mac->instance->index;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_OK_BYTES(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw &mac->stats.RxOctetsOK);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_RX_BAD_BYTES(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw &mac->stats.RxOctetsBad);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw rmon_update(mac, REG_TX_OK_BYTES(port),
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw &mac->stats.TxOctetsOK);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac->instance->ticks++;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw }
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return &mac->stats;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic void mac_destroy(struct cmac *mac)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw t1_os_free((void *)mac, sizeof(*mac) + sizeof(cmac_instance));
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#ifdef C99_NOT_SUPPORTED
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic struct cmac_ops vsc7326_ops = {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_destroy,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_reset,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_intr_enable,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_intr_disable,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_intr_clear,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_intr_handler,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_enable,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_disable,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw NULL,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw NULL,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_set_mtu,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_set_rx_mode,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_set_speed_duplex_fc,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw NULL,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_update_statistics,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_get_address,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac_set_address
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw};
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#else
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic struct cmac_ops vsc7326_ops = {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .destroy = mac_destroy,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .reset = mac_reset,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .interrupt_handler = mac_intr_handler,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .interrupt_enable = mac_intr_enable,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .interrupt_disable = mac_intr_disable,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .interrupt_clear = mac_intr_clear,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .enable = mac_enable,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .disable = mac_disable,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .set_mtu = mac_set_mtu,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .set_rx_mode = mac_set_rx_mode,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .set_speed_duplex_fc = mac_set_speed_duplex_fc,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .statistics_update = mac_update_statistics,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .macaddress_get = mac_get_address,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw .macaddress_set = mac_set_address,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw};
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#endif
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic struct cmac *vsc7326_mac_create(adapter_t *adapter, int index)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw struct cmac *mac;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 val;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw int i;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac = t1_os_malloc_wait_zero(sizeof(*mac) + sizeof(cmac_instance));
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw if (!mac) return NULL;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac->ops = &vsc7326_ops;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac->instance = (cmac_instance *)(mac + 1);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac->adapter = adapter;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac->instance->index = index;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw mac->instance->ticks = 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw i = 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw do {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw u32 vhi, vlo;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vhi = vlo = 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) t1_tpi_read(adapter, (REG_LOCAL_STATUS << 2) + 4, &vlo);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_US(1);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) t1_tpi_read(adapter, REG_LOCAL_STATUS << 2, &vhi);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw DELAY_US(5);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw val = (vhi << 16) | vlo;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw } while ((++i < 10000) && (val == 0xffffffff));
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return mac;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstatic int vsc7326_mac_reset(adapter_t *adapter)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw{
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc7326_full_reset(adapter);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw (void) run_bist_all(adapter);
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw run_table(adapter, vsc7326_reset, DIMOF(vsc7326_reset));
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw return 0;
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw}
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xwstruct gmac t1_vsc7326_ops = {
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw STATS_TICK_SECS,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc7326_mac_create,
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw vsc7326_mac_reset
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw};