d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * CDDL HEADER START
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * The contents of this file are subject to the terms of the
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * Common Development and Distribution License (the "License").
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * You may not use this file except in compliance with the License.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * See the License for the specific language governing permissions
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * and limitations under the License.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * When distributing Covered Code, include this CDDL HEADER in each
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * If applicable, add the following below this CDDL HEADER, with the
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * fields enclosed by brackets "[]" replaced with your own identifying
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * information: Portions Copyright [yyyy] [name of copyright owner]
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw * CDDL HEADER END
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* This file is automatically generated --- do not edit */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* SGE registers */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_RESPONSE_QUEUE_ENABLE(x) ((x) << S_RESPONSE_QUEUE_ENABLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_RESPONSE_QUEUE_ENABLE V_RESPONSE_QUEUE_ENABLE(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CMDQ_PRIORITY(x) (((x) >> S_CMDQ_PRIORITY) & M_CMDQ_PRIORITY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DISABLE_CMDQ0_GTS(x) ((x) << S_DISABLE_CMDQ0_GTS)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DISABLE_CMDQ1_GTS(x) ((x) << S_DISABLE_CMDQ1_GTS)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_ENABLE_BIG_ENDIAN(x) ((x) << S_ENABLE_BIG_ENDIAN)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_FL_SELECTION_CRITERIA(x) ((x) << S_FL_SELECTION_CRITERIA)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_FL_SELECTION_CRITERIA V_FL_SELECTION_CRITERIA(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RX_PKT_OFFSET(x) (((x) >> S_RX_PKT_OFFSET) & M_RX_PKT_OFFSET)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CMDQ0_SIZE(x) (((x) >> S_CMDQ0_SIZE) & M_CMDQ0_SIZE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RESPQ_SIZE(x) (((x) >> S_RESPQ_SIZE) & M_RESPQ_SIZE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_FL_THRESHOLD(x) (((x) >> S_FL_THRESHOLD) & M_FL_THRESHOLD)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RESPQ_CREDIT(x) (((x) >> S_RESPQ_CREDIT) & M_RESPQ_CREDIT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_INTERRUPT_TIMER_COUNT(x) ((x) << S_INTERRUPT_TIMER_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_INTERRUPT_TIMER_COUNT(x) (((x) >> S_INTERRUPT_TIMER_COUNT) & M_INTERRUPT_TIMER_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CMDQ0_POINTER(x) (((x) >> S_CMDQ0_POINTER) & M_CMDQ0_POINTER)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_CURRENT_GENERATION_BIT(x) ((x) << S_CURRENT_GENERATION_BIT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_CURRENT_GENERATION_BIT V_CURRENT_GENERATION_BIT(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CMDQ1_POINTER(x) (((x) >> S_CMDQ1_POINTER) & M_CMDQ1_POINTER)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_FL0_POINTER(x) (((x) >> S_FL0_POINTER) & M_FL0_POINTER)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_FL1_POINTER(x) (((x) >> S_FL1_POINTER) & M_FL1_POINTER)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CMDQ1_SIZE(x) (((x) >> S_CMDQ1_SIZE) & M_CMDQ1_SIZE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* MC3 registers */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_READ_TO_WRITE_DELAY(x) ((x) << S_READ_TO_WRITE_DELAY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_READ_TO_WRITE_DELAY(x) (((x) >> S_READ_TO_WRITE_DELAY) & M_READ_TO_WRITE_DELAY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_WRITE_TO_READ_DELAY(x) ((x) << S_WRITE_TO_READ_DELAY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_WRITE_TO_READ_DELAY(x) (((x) >> S_WRITE_TO_READ_DELAY) & M_WRITE_TO_READ_DELAY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MC3_BANK_CYCLE(x) (((x) >> S_MC3_BANK_CYCLE) & M_MC3_BANK_CYCLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_REFRESH_CYCLE(x) (((x) >> S_REFRESH_CYCLE) & M_REFRESH_CYCLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_PRECHARGE_CYCLE(x) (((x) >> S_PRECHARGE_CYCLE) & M_PRECHARGE_CYCLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_ACTIVE_TO_READ_WRITE_DELAY(x) ((x) << S_ACTIVE_TO_READ_WRITE_DELAY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_ACTIVE_TO_READ_WRITE_DELAY V_ACTIVE_TO_READ_WRITE_DELAY(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_ACTIVE_TO_PRECHARGE_DELAY(x) ((x) << S_ACTIVE_TO_PRECHARGE_DELAY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_ACTIVE_TO_PRECHARGE_DELAY(x) (((x) >> S_ACTIVE_TO_PRECHARGE_DELAY) & M_ACTIVE_TO_PRECHARGE_DELAY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_WRITE_RECOVERY_DELAY(x) ((x) << S_WRITE_RECOVERY_DELAY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_WRITE_RECOVERY_DELAY(x) (((x) >> S_WRITE_RECOVERY_DELAY) & M_WRITE_RECOVERY_DELAY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MC3_WIDTH(x) (((x) >> S_MC3_WIDTH) & M_MC3_WIDTH)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC3_EXTENDED_MODE(x) ((x) << S_MC3_EXTENDED_MODE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MC3_EXTENDED_MODE(x) (((x) >> S_MC3_EXTENDED_MODE) & M_MC3_EXTENDED_MODE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_REFRESH_DIVISOR(x) (((x) >> S_REFRESH_DIVISOR) & M_REFRESH_DIVISOR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MASTER_DLL_TAP_COUNT(x) ((x) << S_MASTER_DLL_TAP_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MASTER_DLL_TAP_COUNT(x) (((x) >> S_MASTER_DLL_TAP_COUNT) & M_MASTER_DLL_TAP_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MASTER_DLL_LOCKED(x) ((x) << S_MASTER_DLL_LOCKED)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MASTER_DLL_MAX_TAP_COUNT(x) ((x) << S_MASTER_DLL_MAX_TAP_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_MASTER_DLL_MAX_TAP_COUNT V_MASTER_DLL_MAX_TAP_COUNT(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MASTER_DLL_TAP_COUNT_OFFSET(x) ((x) << S_MASTER_DLL_TAP_COUNT_OFFSET)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MASTER_DLL_TAP_COUNT_OFFSET(x) (((x) >> S_MASTER_DLL_TAP_COUNT_OFFSET) & M_MASTER_DLL_TAP_COUNT_OFFSET)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SLAVE_DLL_DELTA(x) (((x) >> S_SLAVE_DLL_DELTA) & M_SLAVE_DLL_DELTA)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT(x) ((x) << S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT(x) (((x) >> S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT) & M_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE(x) ((x) << S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_SLAVE_DELAY_LINE_TAP_COUNT(x) ((x) << S_SLAVE_DELAY_LINE_TAP_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SLAVE_DELAY_LINE_TAP_COUNT(x) (((x) >> S_SLAVE_DELAY_LINE_TAP_COUNT) & M_SLAVE_DELAY_LINE_TAP_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_ECC_GENERATION_ENABLE(x) ((x) << S_ECC_GENERATION_ENABLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_ECC_GENERATION_ENABLE V_ECC_GENERATION_ENABLE(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_CORRECTABLE_ERROR_COUNT(x) ((x) << S_CORRECTABLE_ERROR_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CORRECTABLE_ERROR_COUNT(x) (((x) >> S_CORRECTABLE_ERROR_COUNT) & M_CORRECTABLE_ERROR_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_UNCORRECTABLE_ERROR_COUNT(x) ((x) << S_UNCORRECTABLE_ERROR_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_UNCORRECTABLE_ERROR_COUNT(x) (((x) >> S_UNCORRECTABLE_ERROR_COUNT) & M_UNCORRECTABLE_ERROR_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MC3_CE_ADDR(x) (((x) >> S_MC3_CE_ADDR) & M_MC3_CE_ADDR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MC3_UE_ADDR(x) (((x) >> S_MC3_UE_ADDR) & M_MC3_UE_ADDR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_BACK_DOOR_OPERATION(x) ((x) << S_BACK_DOOR_OPERATION)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DATA_PATTERN(x) (((x) >> S_DATA_PATTERN) & M_DATA_PATTERN)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MC3_PARITY_ERR(x) (((x) >> S_MC3_PARITY_ERR) & M_MC3_PARITY_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* MC4 registers */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MC4_BANK_CYCLE(x) (((x) >> S_MC4_BANK_CYCLE) & M_MC4_BANK_CYCLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MC4A_WIDTH(x) (((x) >> S_MC4A_WIDTH) & M_MC4A_WIDTH)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC4_EXTENDED_MODE(x) ((x) << S_MC4_EXTENDED_MODE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MC4_EXTENDED_MODE(x) (((x) >> S_MC4_EXTENDED_MODE) & M_MC4_EXTENDED_MODE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MC4_CE_ADDR(x) (((x) >> S_MC4_CE_ADDR) & M_MC4_CE_ADDR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MC4_UE_ADDR(x) (((x) >> S_MC4_UE_ADDR) & M_MC4_UE_ADDR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC4_BACK_DOOR_ADDR(x) ((x) << S_MC4_BACK_DOOR_ADDR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MC4_BACK_DOOR_ADDR(x) (((x) >> S_MC4_BACK_DOOR_ADDR) & M_MC4_BACK_DOOR_ADDR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* TPI registers */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TPI_ADDRESS(x) (((x) >> S_TPI_ADDRESS) & M_TPI_ADDRESS)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* TP registers */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_IN_CSPI_TUNNEL(x) ((x) << S_TP_IN_CSPI_TUNNEL)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_IN_CSPI_ETHERNET(x) ((x) << S_TP_IN_CSPI_ETHERNET)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_IN_CSPI_CHECK_IP_CSUM(x) ((x) << S_TP_IN_CSPI_CHECK_IP_CSUM)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_TP_IN_CSPI_CHECK_IP_CSUM V_TP_IN_CSPI_CHECK_IP_CSUM(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_IN_CSPI_CHECK_TCP_CSUM(x) ((x) << S_TP_IN_CSPI_CHECK_TCP_CSUM)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_TP_IN_CSPI_CHECK_TCP_CSUM V_TP_IN_CSPI_CHECK_TCP_CSUM(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_IN_ESPI_TUNNEL(x) ((x) << S_TP_IN_ESPI_TUNNEL)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_IN_ESPI_ETHERNET(x) ((x) << S_TP_IN_ESPI_ETHERNET)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_IN_ESPI_CHECK_IP_CSUM(x) ((x) << S_TP_IN_ESPI_CHECK_IP_CSUM)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_TP_IN_ESPI_CHECK_IP_CSUM V_TP_IN_ESPI_CHECK_IP_CSUM(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_IN_ESPI_CHECK_TCP_CSUM(x) ((x) << S_TP_IN_ESPI_CHECK_TCP_CSUM)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_TP_IN_ESPI_CHECK_TCP_CSUM V_TP_IN_ESPI_CHECK_TCP_CSUM(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_OUT_CSPI_GENERATE_IP_CSUM(x) ((x) << S_TP_OUT_CSPI_GENERATE_IP_CSUM)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_TP_OUT_CSPI_GENERATE_IP_CSUM V_TP_OUT_CSPI_GENERATE_IP_CSUM(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_OUT_CSPI_GENERATE_TCP_CSUM(x) ((x) << S_TP_OUT_CSPI_GENERATE_TCP_CSUM)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_TP_OUT_CSPI_GENERATE_TCP_CSUM V_TP_OUT_CSPI_GENERATE_TCP_CSUM(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_OUT_ESPI_ETHERNET(x) ((x) << S_TP_OUT_ESPI_ETHERNET)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_OUT_ESPI_TAG_ETHERNET(x) ((x) << S_TP_OUT_ESPI_TAG_ETHERNET)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_TP_OUT_ESPI_TAG_ETHERNET V_TP_OUT_ESPI_TAG_ETHERNET(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_OUT_ESPI_GENERATE_IP_CSUM(x) ((x) << S_TP_OUT_ESPI_GENERATE_IP_CSUM)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_TP_OUT_ESPI_GENERATE_IP_CSUM V_TP_OUT_ESPI_GENERATE_IP_CSUM(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_OUT_ESPI_GENERATE_TCP_CSUM(x) ((x) << S_TP_OUT_ESPI_GENERATE_TCP_CSUM)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_TP_OUT_ESPI_GENERATE_TCP_CSUM V_TP_OUT_ESPI_GENERATE_TCP_CSUM(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TCAM_SERVER_REGION_USAGE(x) ((x) << S_TCAM_SERVER_REGION_USAGE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TCAM_SERVER_REGION_USAGE(x) (((x) >> S_TCAM_SERVER_REGION_USAGE) & M_TCAM_SERVER_REGION_USAGE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_5TUPLE_LOOKUP(x) (((x) >> S_5TUPLE_LOOKUP) & M_5TUPLE_LOOKUP)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_SYN_COOKIE_ALGORITHM(x) ((x) << S_SYN_COOKIE_ALGORITHM)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DISABLE_RX_FLOW_CONTROL(x) ((x) << S_DISABLE_RX_FLOW_CONTROL)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_DISABLE_RX_FLOW_CONTROL V_DISABLE_RX_FLOW_CONTROL(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_SYN_COOKIE_PARAMETER(x) ((x) << S_SYN_COOKIE_PARAMETER)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SYN_COOKIE_PARAMETER(x) (((x) >> S_SYN_COOKIE_PARAMETER) & M_SYN_COOKIE_PARAMETER)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CM_MEMMGR_BASE(x) (((x) >> S_CM_MEMMGR_BASE) & M_CM_MEMMGR_BASE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CM_TIMER_BASE(x) (((x) >> S_CM_TIMER_BASE) & M_CM_TIMER_BASE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TIMESTAMP(x) (((x) >> S_TIMESTAMP) & M_TIMESTAMP)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_WINDOW_SCALE(x) (((x) >> S_WINDOW_SCALE) & M_WINDOW_SCALE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SACK_ALGORITHM(x) (((x) >> S_SACK_ALGORITHM) & M_SACK_ALGORITHM)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DEFAULT_PEER_MSS(x) (((x) >> S_DEFAULT_PEER_MSS) & M_DEFAULT_PEER_MSS)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DACK_AUTO_CAREFUL(x) ((x) << S_DACK_AUTO_CAREFUL)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DACK_MSS_SELECTOR(x) ((x) << S_DACK_MSS_SELECTOR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DACK_MSS_SELECTOR(x) (((x) >> S_DACK_MSS_SELECTOR) & M_DACK_MSS_SELECTOR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DACK_BYTE_THRESHOLD(x) ((x) << S_DACK_BYTE_THRESHOLD)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DACK_BYTE_THRESHOLD(x) (((x) >> S_DACK_BYTE_THRESHOLD) & M_DACK_BYTE_THRESHOLD)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TP_ACCESS_LATENCY(x) ((x) << S_TP_ACCESS_LATENCY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TP_ACCESS_LATENCY(x) (((x) >> S_TP_ACCESS_LATENCY) & M_TP_ACCESS_LATENCY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_FAST_PDU_DELIVERY(x) ((x) << S_FAST_PDU_DELIVERY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DIS_TX_FILL_WIN_PUSH(x) ((x) << S_DIS_TX_FILL_WIN_PUSH)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TP_PC_REV(x) (((x) >> S_TP_PC_REV) & M_TP_PC_REV)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SRTT_GAIN(x) (((x) >> S_SRTT_GAIN) & M_SRTT_GAIN)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RTTVAR_INIT(x) (((x) >> S_RTTVAR_INIT) & M_RTTVAR_INIT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DUP_THRESH(x) (((x) >> S_DUP_THRESH) & M_DUP_THRESH)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_INIT_CONG_WIN(x) (((x) >> S_INIT_CONG_WIN) & M_INIT_CONG_WIN)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_INITIAL_SLOW_START_THRESHOLD(x) ((x) << S_INITIAL_SLOW_START_THRESHOLD)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_INITIAL_SLOW_START_THRESHOLD(x) (((x) >> S_INITIAL_SLOW_START_THRESHOLD) & M_INITIAL_SLOW_START_THRESHOLD)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_RECEIVE_BUFFER_SIZE(x) ((x) << S_RECEIVE_BUFFER_SIZE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RECEIVE_BUFFER_SIZE(x) (((x) >> S_RECEIVE_BUFFER_SIZE) & M_RECEIVE_BUFFER_SIZE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RX_COALESCE_SIZE(x) (((x) >> S_RX_COALESCE_SIZE) & M_RX_COALESCE_SIZE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MAX_RX_SIZE(x) (((x) >> S_MAX_RX_SIZE) & M_MAX_RX_SIZE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_RX_COALESCING_PSH_DELIVER(x) ((x) << S_RX_COALESCING_PSH_DELIVER)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_RX_COALESCING_PSH_DELIVER V_RX_COALESCING_PSH_DELIVER(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_RX_COALESCING_ENABLE(x) ((x) << S_RX_COALESCING_ENABLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MAX_REORDER_FRAGMENTS(x) ((x) << S_MAX_REORDER_FRAGMENTS)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MAX_REORDER_FRAGMENTS(x) (((x) >> S_MAX_REORDER_FRAGMENTS) & M_MAX_REORDER_FRAGMENTS)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DELAYED_ACK_TIMER_RESOLUTION(x) ((x) << S_DELAYED_ACK_TIMER_RESOLUTION)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DELAYED_ACK_TIMER_RESOLUTION(x) (((x) >> S_DELAYED_ACK_TIMER_RESOLUTION) & M_DELAYED_ACK_TIMER_RESOLUTION)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_GENERIC_TIMER_RESOLUTION(x) ((x) << S_GENERIC_TIMER_RESOLUTION)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_GENERIC_TIMER_RESOLUTION(x) (((x) >> S_GENERIC_TIMER_RESOLUTION) & M_GENERIC_TIMER_RESOLUTION)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_RETRANSMIT_TIMER_MIN(x) ((x) << S_RETRANSMIT_TIMER_MIN)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RETRANSMIT_TIMER_MIN(x) (((x) >> S_RETRANSMIT_TIMER_MIN) & M_RETRANSMIT_TIMER_MIN)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_RETRANSMIT_TIMER_MAX(x) ((x) << S_RETRANSMIT_TIMER_MAX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RETRANSMIT_TIMER_MAX(x) (((x) >> S_RETRANSMIT_TIMER_MAX) & M_RETRANSMIT_TIMER_MAX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_PERSIST_TIMER_MIN(x) ((x) << S_PERSIST_TIMER_MIN)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_PERSIST_TIMER_MIN(x) (((x) >> S_PERSIST_TIMER_MIN) & M_PERSIST_TIMER_MIN)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_PERSIST_TIMER_MAX(x) ((x) << S_PERSIST_TIMER_MAX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_PERSIST_TIMER_MAX(x) (((x) >> S_PERSIST_TIMER_MAX) & M_PERSIST_TIMER_MAX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_KEEP_ALIVE_IDLE_TIME(x) ((x) << S_KEEP_ALIVE_IDLE_TIME)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_KEEP_ALIVE_IDLE_TIME(x) (((x) >> S_KEEP_ALIVE_IDLE_TIME) & M_KEEP_ALIVE_IDLE_TIME)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_KEEP_ALIVE_INTERVAL_TIME(x) ((x) << S_KEEP_ALIVE_INTERVAL_TIME)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_KEEP_ALIVE_INTERVAL_TIME(x) (((x) >> S_KEEP_ALIVE_INTERVAL_TIME) & M_KEEP_ALIVE_INTERVAL_TIME)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_INITIAL_SRTT(x) (((x) >> S_INITIAL_SRTT) & M_INITIAL_SRTT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DELAYED_ACK_TIME(x) (((x) >> S_DELAYED_ACK_TIME) & M_DELAYED_ACK_TIME)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_FINWAIT2_TIME(x) (((x) >> S_FINWAIT2_TIME) & M_FINWAIT2_TIME)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_FAST_FINWAIT2_TIME(x) ((x) << S_FAST_FINWAIT2_TIME)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_FAST_FINWAIT2_TIME(x) (((x) >> S_FAST_FINWAIT2_TIME) & M_FAST_FINWAIT2_TIME)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_KEEPALIVE_MAX(x) (((x) >> S_KEEPALIVE_MAX) & M_KEEPALIVE_MAX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_WINDOWPROBE_MAX(x) (((x) >> S_WINDOWPROBE_MAX) & M_WINDOWPROBE_MAX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_RETRANSMISSION_MAX(x) ((x) << S_RETRANSMISSION_MAX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RETRANSMISSION_MAX(x) (((x) >> S_RETRANSMISSION_MAX) & M_RETRANSMISSION_MAX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_CM_MEMMGR_RX_FREE_LIST_BASE(x) ((x) << S_CM_MEMMGR_RX_FREE_LIST_BASE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CM_MEMMGR_RX_FREE_LIST_BASE(x) (((x) >> S_CM_MEMMGR_RX_FREE_LIST_BASE) & M_CM_MEMMGR_RX_FREE_LIST_BASE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_CM_MEMMGR_TX_FREE_LIST_BASE(x) ((x) << S_CM_MEMMGR_TX_FREE_LIST_BASE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CM_MEMMGR_TX_FREE_LIST_BASE(x) (((x) >> S_CM_MEMMGR_TX_FREE_LIST_BASE) & M_CM_MEMMGR_TX_FREE_LIST_BASE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE(x) ((x) << S_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE(x) (((x) >> S_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE) & M_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_CM_MEMMGR_MAX_PSTRUCT(x) ((x) << S_CM_MEMMGR_MAX_PSTRUCT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CM_MEMMGR_MAX_PSTRUCT(x) (((x) >> S_CM_MEMMGR_MAX_PSTRUCT) & M_CM_MEMMGR_MAX_PSTRUCT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TX_FREE_LIST_EMPTY(x) ((x) << S_TX_FREE_LIST_EMPTY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_RX_FREE_LIST_EMPTY(x) ((x) << S_RX_FREE_LIST_EMPTY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DISABLE_PAST_TIMER_INSERTION(x) ((x) << S_DISABLE_PAST_TIMER_INSERTION)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_DISABLE_PAST_TIMER_INSERTION V_DISABLE_PAST_TIMER_INSERTION(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MODULATION_TIMER_SEPARATOR(x) ((x) << S_MODULATION_TIMER_SEPARATOR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MODULATION_TIMER_SEPARATOR(x) (((x) >> S_MODULATION_TIMER_SEPARATOR) & M_MODULATION_TIMER_SEPARATOR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_GLOBAL_TIMER_SEPARATOR(x) ((x) << S_GLOBAL_TIMER_SEPARATOR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_GLOBAL_TIMER_SEPARATOR(x) (((x) >> S_GLOBAL_TIMER_SEPARATOR) & M_GLOBAL_TIMER_SEPARATOR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DROP_TICKS_CNT(x) (((x) >> S_DROP_TICKS_CNT) & M_DROP_TICKS_CNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_NUM_PKTS_DROPPED(x) (((x) >> S_NUM_PKTS_DROPPED) & M_NUM_PKTS_DROPPED)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* RAT registers */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_ROUTE_TABLE_INDEX(x) ((x) << S_ROUTE_TABLE_INDEX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_ROUTE_TABLE_INDEX(x) (((x) >> S_ROUTE_TABLE_INDEX) & M_ROUTE_TABLE_INDEX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CPL_OPCODE(x) (((x) >> S_CPL_OPCODE) & M_CPL_OPCODE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* CSPI registers */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CALENDARLENGTH(x) (((x) >> S_CALENDARLENGTH) & M_CALENDARLENGTH)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MAXBURST1(x) (((x) >> S_MAXBURST1) & M_MAXBURST1)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MAXBURST2(x) (((x) >> S_MAXBURST2) & M_MAXBURST2)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CSPI_TRAIN_ALPHA(x) (((x) >> S_CSPI_TRAIN_ALPHA) & M_CSPI_TRAIN_ALPHA)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_CSPI_TRAIN_DATA_MAXT(x) ((x) << S_CSPI_TRAIN_DATA_MAXT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CSPI_TRAIN_DATA_MAXT(x) (((x) >> S_CSPI_TRAIN_DATA_MAXT) & M_CSPI_TRAIN_DATA_MAXT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* ESPI registers */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SCHTOKEN0(x) (((x) >> S_SCHTOKEN0) & M_SCHTOKEN0)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SCHTOKEN1(x) (((x) >> S_SCHTOKEN1) & M_SCHTOKEN1)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SCHTOKEN2(x) (((x) >> S_SCHTOKEN2) & M_SCHTOKEN2)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SCHTOKEN3(x) (((x) >> S_SCHTOKEN3) & M_SCHTOKEN3)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_ALMOSTEMPTY(x) (((x) >> S_ALMOSTEMPTY) & M_ALMOSTEMPTY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_ALMOSTFULL(x) (((x) >> S_ALMOSTFULL) & M_ALMOSTFULL)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RX_NPORTS(x) (((x) >> S_RX_NPORTS) & M_RX_NPORTS)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TX_NPORTS(x) (((x) >> S_TX_NPORTS) & M_TX_NPORTS)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MAXTRAINALPHA(x) (((x) >> S_MAXTRAINALPHA) & M_MAXTRAINALPHA)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MAXTRAINDATA(x) (((x) >> S_MAXTRAINDATA) & M_MAXTRAINDATA)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_RXFIFOPARITYERROR(x) ((x) << S_RXFIFOPARITYERROR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RXFIFOPARITYERROR(x) (((x) >> S_RXFIFOPARITYERROR) & M_RXFIFOPARITYERROR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TXFIFOPARITYERROR(x) ((x) << S_TXFIFOPARITYERROR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TXFIFOPARITYERROR(x) (((x) >> S_TXFIFOPARITYERROR) & M_TXFIFOPARITYERROR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RXFIFOOVERFLOW(x) (((x) >> S_RXFIFOOVERFLOW) & M_RXFIFOOVERFLOW)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TXPORT0DROPCNT(x) (((x) >> S_TXPORT0DROPCNT) & M_TXPORT0DROPCNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TXPORT1DROPCNT(x) (((x) >> S_TXPORT1DROPCNT) & M_TXPORT1DROPCNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TXPORT2DROPCNT(x) (((x) >> S_TXPORT2DROPCNT) & M_TXPORT2DROPCNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TXPORT3DROPCNT(x) (((x) >> S_TXPORT3DROPCNT) & M_TXPORT3DROPCNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RXPORT0DROPCNT(x) (((x) >> S_RXPORT0DROPCNT) & M_RXPORT0DROPCNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RXPORT1DROPCNT(x) (((x) >> S_RXPORT1DROPCNT) & M_RXPORT1DROPCNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RXPORT2DROPCNT(x) (((x) >> S_RXPORT2DROPCNT) & M_RXPORT2DROPCNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RXPORT3DROPCNT(x) (((x) >> S_RXPORT3DROPCNT) & M_RXPORT3DROPCNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DIP4ERRORCNT(x) (((x) >> S_DIP4ERRORCNT) & M_DIP4ERRORCNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DIP4ERRORCNTSHADOW(x) ((x) << S_DIP4ERRORCNTSHADOW)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DIP4ERRORCNTSHADOW(x) (((x) >> S_DIP4ERRORCNTSHADOW) & M_DIP4ERRORCNTSHADOW)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TRICN_RX_TRAIN_ERR(x) ((x) << S_TRICN_RX_TRAIN_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TRICN_RX_TRAINING(x) ((x) << S_TRICN_RX_TRAINING)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TRICN_RX_TRAIN_OK(x) ((x) << S_TRICN_RX_TRAIN_OK)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_OUT_OF_SYNC_COUNT(x) ((x) << S_OUT_OF_SYNC_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_OUT_OF_SYNC_COUNT(x) (((x) >> S_OUT_OF_SYNC_COUNT) & M_OUT_OF_SYNC_COUNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DIP2_COUNT_MODE_ENABLE(x) ((x) << S_DIP2_COUNT_MODE_ENABLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_DIP2_COUNT_MODE_ENABLE V_DIP2_COUNT_MODE_ENABLE(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DIP2_PARITY_ERR_THRES(x) ((x) << S_DIP2_PARITY_ERR_THRES)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DIP2_PARITY_ERR_THRES(x) (((x) >> S_DIP2_PARITY_ERR_THRES) & M_DIP2_PARITY_ERR_THRES)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DIP4_THRES(x) (((x) >> S_DIP4_THRES) & M_DIP4_THRES)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DIP4_THRES_ENABLE(x) ((x) << S_DIP4_THRES_ENABLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_FORCE_DISABLE_STATUS(x) ((x) << S_FORCE_DISABLE_STATUS)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MONITORED_PORT_NUM(x) ((x) << S_MONITORED_PORT_NUM)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MONITORED_PORT_NUM(x) (((x) >> S_MONITORED_PORT_NUM) & M_MONITORED_PORT_NUM)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MONITORED_DIRECTION(x) ((x) << S_MONITORED_DIRECTION)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MONITORED_INTERFACE(x) ((x) << S_MONITORED_INTERFACE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DIP2_ERR_CNT(x) (((x) >> S_DIP2_ERR_CNT) & M_DIP2_ERR_CNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_WRITE_DATA(x) (((x) >> S_WRITE_DATA) & M_WRITE_DATA)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_REGISTER_OFFSET(x) (((x) >> S_REGISTER_OFFSET) & M_REGISTER_OFFSET)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CHANNEL_ADDR(x) (((x) >> S_CHANNEL_ADDR) & M_CHANNEL_ADDR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_MODULE_ADDR(x) (((x) >> S_MODULE_ADDR) & M_MODULE_ADDR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_BUNDLE_ADDR(x) (((x) >> S_BUNDLE_ADDR) & M_BUNDLE_ADDR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SPI4_COMMAND(x) (((x) >> S_SPI4_COMMAND) & M_SPI4_COMMAND)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_READ_DATA(x) (((x) >> S_READ_DATA) & M_READ_DATA)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TRANSACTION_TIMER(x) ((x) << S_TRANSACTION_TIMER)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TRANSACTION_TIMER(x) (((x) >> S_TRANSACTION_TIMER) & M_TRANSACTION_TIMER)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* ULP registers */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_EGRS_DATA_PAR_ERR(x) ((x) << S_EGRS_DATA_PAR_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_INGRS_DATA_PAR_ERR(x) ((x) << S_INGRS_DATA_PAR_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_PM_PAR_ERR(x) (((x) >> S_PM_PAR_ERR) & M_PM_PAR_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* PL registers */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* MC5 registers */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SYN_ISSUE_MODE(x) (((x) >> S_SYN_ISSUE_MODE) & M_SYN_ISSUE_MODE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_COMPRESSION_ENABLE(x) ((x) << S_COMPRESSION_ENABLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TCAM_PART_CNT(x) (((x) >> S_TCAM_PART_CNT) & M_TCAM_PART_CNT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TCAM_PART_TYPE(x) (((x) >> S_TCAM_PART_TYPE) & M_TCAM_PART_TYPE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_TCAM_PART_SIZE(x) (((x) >> S_TCAM_PART_SIZE) & M_TCAM_PART_SIZE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_TCAM_PART_TYPE_HI(x) ((x) << S_TCAM_PART_TYPE_HI)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_START_OF_ROUTING_TABLE(x) ((x) << S_START_OF_ROUTING_TABLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_START_OF_ROUTING_TABLE(x) (((x) >> S_START_OF_ROUTING_TABLE) & M_START_OF_ROUTING_TABLE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_START_OF_SERVER_INDEX(x) ((x) << S_START_OF_SERVER_INDEX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_START_OF_SERVER_INDEX(x) (((x) >> S_START_OF_SERVER_INDEX) & M_START_OF_SERVER_INDEX)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_LOCAL_IP_RAM_ADDR(x) ((x) << S_LOCAL_IP_RAM_ADDR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_LOCAL_IP_RAM_ADDR(x) (((x) >> S_LOCAL_IP_RAM_ADDR) & M_LOCAL_IP_RAM_ADDR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_SEARCH_RESPONSE_LATENCY(x) ((x) << S_SEARCH_RESPONSE_LATENCY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_SEARCH_RESPONSE_LATENCY(x) (((x) >> S_SEARCH_RESPONSE_LATENCY) & M_SEARCH_RESPONSE_LATENCY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_LEARN_RESPONSE_LATENCY(x) ((x) << S_LEARN_RESPONSE_LATENCY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_LEARN_RESPONSE_LATENCY(x) (((x) >> S_LEARN_RESPONSE_LATENCY) & M_LEARN_RESPONSE_LATENCY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR(x) ((x) << S_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR V_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_HIT_IN_ACTIVE_REGION_ERR(x) ((x) << S_MC5_INT_HIT_IN_ACTIVE_REGION_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_MC5_INT_HIT_IN_ACTIVE_REGION_ERR V_MC5_INT_HIT_IN_ACTIVE_REGION_ERR(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_HIT_IN_RT_REGION_ERR(x) ((x) << S_MC5_INT_HIT_IN_RT_REGION_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_MC5_INT_HIT_IN_RT_REGION_ERR V_MC5_INT_HIT_IN_RT_REGION_ERR(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_LIP_MISS_ERR(x) ((x) << S_MC5_INT_LIP_MISS_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_PARITY_ERR(x) ((x) << S_MC5_INT_PARITY_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_ACTIVE_REGION_FULL(x) ((x) << S_MC5_INT_ACTIVE_REGION_FULL)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_MC5_INT_ACTIVE_REGION_FULL V_MC5_INT_ACTIVE_REGION_FULL(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_NFA_SRCH_ERR(x) ((x) << S_MC5_INT_NFA_SRCH_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_SYN_COOKIE(x) ((x) << S_MC5_INT_SYN_COOKIE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_SYN_COOKIE_BAD(x) ((x) << S_MC5_INT_SYN_COOKIE_BAD)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_MC5_INT_SYN_COOKIE_BAD V_MC5_INT_SYN_COOKIE_BAD(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_SYN_COOKIE_OFF(x) ((x) << S_MC5_INT_SYN_COOKIE_OFF)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_MC5_INT_SYN_COOKIE_OFF V_MC5_INT_SYN_COOKIE_OFF(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_UNKNOWN_CMD(x) ((x) << S_MC5_INT_UNKNOWN_CMD)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_REQUESTQ_PARITY_ERR(x) ((x) << S_MC5_INT_REQUESTQ_PARITY_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_MC5_INT_REQUESTQ_PARITY_ERR V_MC5_INT_REQUESTQ_PARITY_ERR(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_DISPATCHQ_PARITY_ERR(x) ((x) << S_MC5_INT_DISPATCHQ_PARITY_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_MC5_INT_DISPATCHQ_PARITY_ERR V_MC5_INT_DISPATCHQ_PARITY_ERR(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MC5_INT_DEL_ACT_EMPTY(x) ((x) << S_MC5_INT_DEL_ACT_EMPTY)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define F_MC5_INT_DEL_ACT_EMPTY V_MC5_INT_DEL_ACT_EMPTY(1U)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_WRITE_BURST_SIZE(x) (((x) >> S_WRITE_BURST_SIZE) & M_WRITE_BURST_SIZE)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_DBGI_RSP_ERR_REASON(x) ((x) << S_DBGI_RSP_ERR_REASON)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_DBGI_RSP_ERR_REASON(x) (((x) >> S_DBGI_RSP_ERR_REASON) & M_DBGI_RSP_ERR_REASON)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw/* PCICFG registers */
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_MASTER_PARITY_ERR(x) ((x) << S_MASTER_PARITY_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_RF_PARITY_ERR(x) (((x) >> S_RF_PARITY_ERR) & M_RF_PARITY_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_CF_PARITY_ERR(x) (((x) >> S_CF_PARITY_ERR) & M_CF_PARITY_ERR)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define V_PCI_MODE_PCIX_INITPAT(x) ((x) << S_PCI_MODE_PCIX_INITPAT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_PCI_MODE_PCIX_INITPAT(x) (((x) >> S_PCI_MODE_PCIX_INITPAT) & M_PCI_MODE_PCIX_INITPAT)
d39a76e7b087a3d0927cbe6898dc0a6770fa6c68xw#define G_PCI_MODE_CLK(x) (((x) >> S_PCI_MODE_CLK) & M_PCI_MODE_CLK)