espi.c revision d39a76e7b087a3d0927cbe6898dc0a6770fa6c68
1N/A * The contents of this file are subject to the terms of the 1N/A * Common Development and Distribution License (the "License"). 1N/A * You may not use this file except in compliance with the License. 1N/A * See the License for the specific language governing permissions 1N/A * and limitations under the License. 1N/A * When distributing Covered Code, include this CDDL HEADER in each 1N/A * If applicable, add the following below this CDDL HEADER, with the 1N/A * fields enclosed by brackets "[]" replaced with your own identifying 1N/A * information: Portions Copyright [yyyy] [name of copyright owner] 1N/A * Copyright (C) 2003-2005 Chelsio Communications. All rights reserved. 1N/A#
pragma ident "%Z%%M% %I% %E% SMI" /* espi.c */ 1N/A * Cannot enable ESPI interrupts on T1B because HW asserts the 1N/A * interrupt incorrectly, namely the driver gets ESPI interrupts 1N/A * but no data is actually dropped (can verify this reading the ESPI 1N/A * drop registers). Also, once the ESPI interrupt is asserted it 1N/A * cannot be cleared (HW bug). 1N/A * For T1B we need to write 1 to clear ESPI interrupts. For T2+ we 1N/A * write the status as is. 1N/A * Note that T1B requires at least 2 ports for IXF1010 due to a HW bug. 1N/A /* Disable ESPI training. MACs that can handle it enable it below. */ 1N/A * Always position the control at the 1st port egress IN 1N/A * (sop,eop) counter to reduce PIOs for T/N210 workaround. 1N/A * This function is for T204 only. 1N/A * compare with t1_espi_get_mon(), it reads espiInTxSop[0 ~ 3] in 1N/A * one shot, since there is no per port counter on the out side.