fa9e4066f08beec538e775443c5be79dd423fcabahrens * CDDL HEADER START
fa9e4066f08beec538e775443c5be79dd423fcabahrens * The contents of this file are subject to the terms of the
ea8dc4b6d2251b437950c0056bc626b311c73c27eschrock * Common Development and Distribution License (the "License").
ea8dc4b6d2251b437950c0056bc626b311c73c27eschrock * You may not use this file except in compliance with the License.
fa9e4066f08beec538e775443c5be79dd423fcabahrens * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
fa9e4066f08beec538e775443c5be79dd423fcabahrens * See the License for the specific language governing permissions
fa9e4066f08beec538e775443c5be79dd423fcabahrens * and limitations under the License.
fa9e4066f08beec538e775443c5be79dd423fcabahrens * When distributing Covered Code, include this CDDL HEADER in each
fa9e4066f08beec538e775443c5be79dd423fcabahrens * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
fa9e4066f08beec538e775443c5be79dd423fcabahrens * If applicable, add the following below this CDDL HEADER, with the
fa9e4066f08beec538e775443c5be79dd423fcabahrens * fields enclosed by brackets "[]" replaced with your own identifying
fa9e4066f08beec538e775443c5be79dd423fcabahrens * information: Portions Copyright [yyyy] [name of copyright owner]
fa9e4066f08beec538e775443c5be79dd423fcabahrens * CDDL HEADER END
beb562835cfbfcc73ae96a39ad1ef3e0446d299cShampavman * Copyright 2014 QLogic Corporation
fa9e4066f08beec538e775443c5be79dd423fcabahrens * The contents of this file are subject to the terms of the
fa9e4066f08beec538e775443c5be79dd423fcabahrens * QLogic End User License (the "License").
55da60b91d96984f12de050ce428373ea25c7f35Mark J Musante * You may not use this file except in compliance with the License.
fa9e4066f08beec538e775443c5be79dd423fcabahrens * You can obtain a copy of the License at
fa9e4066f08beec538e775443c5be79dd423fcabahrens * http://www.qlogic.com/Resources/Documents/DriverDownloadHelp/
fa9e4066f08beec538e775443c5be79dd423fcabahrens * See the License for the specific language governing permissions
fa9e4066f08beec538e775443c5be79dd423fcabahrens * and limitations under the License.
fa9e4066f08beec538e775443c5be79dd423fcabahrens * Copyright (c) 2002, 2011, Oracle and/or its affiliates. All rights reserved.
0a586cea3ceec7e5e50e7e54c745082a7a333ac2Mark Shellenbaumtypedef struct
feef89cf5f5fee792c1a396bb0e48070935cf65aVictor Latushkin /* Buffers TX BD Pages TX Coalesce Bufs */
fa9e4066f08beec538e775443c5be79dd423fcabahrens { 0, 0, 0 }
fa9e4066f08beec538e775443c5be79dd423fcabahrens 0, /* dma_attr_addr_lo */
fa9e4066f08beec538e775443c5be79dd423fcabahrens 0, /* dma_attr_align */
fa9e4066f08beec538e775443c5be79dd423fcabahrens 0, /* dma_attr_flags */
fa9e4066f08beec538e775443c5be79dd423fcabahrens *pRegValue = pci_config_get32(pUM->pPciCfg, (off_t)pciReg);
fa9e4066f08beec538e775443c5be79dd423fcabahrens pci_config_put32(pUM->pPciCfg, (off_t)pciReg, regValue);
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling pLM->params.l2_tx_bd_page_cnt[cli_idx] = BNXE_DEF_TX_BD_PAGE_CNT;
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling pLM->params.l2_tx_coal_buf_cnt[cli_idx] = BNXE_DEF_TX_COAL_BUF_CNT;
fa9e4066f08beec538e775443c5be79dd423fcabahrens if (pLM->params.l2_rx_desc_cnt[cli_idx] <= pPageCfg->bufCnt)
fa9e4066f08beec538e775443c5be79dd423fcabahrens pLM->params.l2_tx_bd_page_cnt[cli_idx] = pPageCfg->txBdPageCnt;
fa9e4066f08beec538e775443c5be79dd423fcabahrens pLM->params.l2_tx_coal_buf_cnt[cli_idx] = pPageCfg->txCoalBufCnt;
fa9e4066f08beec538e775443c5be79dd423fcabahrensunsigned long log2_align(unsigned long n);
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* XXX Wake on LAN? */
fa9e4066f08beec538e775443c5be79dd423fcabahrens //pLM->params.wol_cap = (LM_WAKE_UP_MODE_MAGIC_PACKET | LM_WAKE_UP_MODE_NWUF);
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* keep the VLAN tag in the mac header when receiving */
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* set in BnxeIntrInit based on the allocated number of MSIX interrupts */
fa9e4066f08beec538e775443c5be79dd423fcabahrens //pLM->params.rss_chain_cnt = pUM->devParams.numRings;
fa9e4066f08beec538e775443c5be79dd423fcabahrens //pLM->params.tss_chain_cnt = pUM->devParams.numRings;
fa9e4066f08beec538e775443c5be79dd423fcabahrens pLM->params.l2_rx_desc_cnt[LM_CLI_IDX_NDIS] = pUM->devParams.numRxDesc[LM_CLI_IDX_NDIS];
fa9e4066f08beec538e775443c5be79dd423fcabahrens pLM->params.l2_tx_coal_buf_cnt[LM_CLI_IDX_ISCSI] = 0;
fa9e4066f08beec538e775443c5be79dd423fcabahrens pLM->params.max_func_fcoe_cons = pUM->lm_dev.hw_info.max_port_fcoe_conn;
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* determine: 1. itl_client_page_size, #context in page*/
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* based on PCIe block INIT document */
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* We now need to calculate the page size based on the maximum number of
fa9e4066f08beec538e775443c5be79dd423fcabahrens * connections supported. Since this property is identical to all ports, and
fa9e4066f08beec538e775443c5be79dd423fcabahrens * is configured in COMMON registers, we need to use the maximum number of
fa9e4066f08beec538e775443c5be79dd423fcabahrens * connections in all ports. */
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* The L2P table is used to map logical addresses to physical ones. There
fa9e4066f08beec538e775443c5be79dd423fcabahrens * are four clients that use this table. We want to use only the ILT
fa9e4066f08beec538e775443c5be79dd423fcabahrens * (Internal), we need to calculate the total size required for all clients,
4223fc7cdcf5a51019f631eec2b4217ddf736451Mark Shellenbaum * divide it by the number of entries in the ILT table and that will give us
fa9e4066f08beec538e775443c5be79dd423fcabahrens * the page size we want. The following table describes the needs of each of
fa9e4066f08beec538e775443c5be79dd423fcabahrens * these clients:
fa9e4066f08beec538e775443c5be79dd423fcabahrens * HW block(L2P client) Area name Size [B]
fa9e4066f08beec538e775443c5be79dd423fcabahrens * Searcher T1 ROUNDUP(LOG2(N)) * 64
fa9e4066f08beec538e775443c5be79dd423fcabahrens * Timers Linear Array N * 8
fa9e4066f08beec538e775443c5be79dd423fcabahrens * QM Queues N * 32 * 4
4223fc7cdcf5a51019f631eec2b4217ddf736451Mark Shellenbaum * CDU Context N * S + W * ROUNDUP (N/m) (W=0)
4223fc7cdcf5a51019f631eec2b4217ddf736451Mark Shellenbaum * N: Number of connections
fa9e4066f08beec538e775443c5be79dd423fcabahrens * S: Context Size
fa9e4066f08beec538e775443c5be79dd423fcabahrens * W: Block Waste (not really interesting) we configure the context size to
fa9e4066f08beec538e775443c5be79dd423fcabahrens * be a power of 2.
fa9e4066f08beec538e775443c5be79dd423fcabahrens * m: Number of cids in a block (not really interesting, since W will always
fa9e4066f08beec538e775443c5be79dd423fcabahrens required_page_size = (total_size / ILT_NUM_PAGE_ENTRIES_PER_FUNC);
fa9e4066f08beec538e775443c5be79dd423fcabahrens required_page_size = (2 << LOG2(required_page_size));
fa9e4066f08beec538e775443c5be79dd423fcabahrens pLM->params.ilt_client_page_size = required_page_size;
fa9e4066f08beec538e775443c5be79dd423fcabahrens pLM->params.num_context_in_page = (pLM->params.ilt_client_page_size /
fa9e4066f08beec538e775443c5be79dd423fcabahrens pLM->params.int_coalesing_mode = LM_INT_COAL_PERIODIC_SYNC;
fa9e4066f08beec538e775443c5be79dd423fcabahrens pLM->params.int_per_sec_rx_override = pUM->devParams.intrRxPerSec;
fa9e4066f08beec538e775443c5be79dd423fcabahrens pLM->params.int_per_sec_tx_override = pUM->devParams.intrTxPerSec;
fa9e4066f08beec538e775443c5be79dd423fcabahrens * l2_fw_flow_ctrl is read from the shmem in MF mode in E2 and above. In
fa9e4066f08beec538e775443c5be79dd423fcabahrens * all other cases this parameter is read from the driver conf. We also
fa9e4066f08beec538e775443c5be79dd423fcabahrens * read this parameter from the driver conf in E1.5 MF mode since 57711
fa9e4066f08beec538e775443c5be79dd423fcabahrens * boot code does not have the struct func_ext_cfg.
fa9e4066f08beec538e775443c5be79dd423fcabahrens if (((pLM->hw_info.mf_info.mf_mode != MULTI_FUNCTION_SI) &&
fa9e4066f08beec538e775443c5be79dd423fcabahrens (pLM->hw_info.mf_info.mf_mode != MULTI_FUNCTION_AFEX)) ||
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens pLM->params.l2_fw_flow_ctrl = (pUM->devParams.l2_fw_flow_ctrl) ? 1 : 0;
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens pLM->params.debug_cap_flags = DEFAULT_DEBUG_CAP_FLAGS_VAL;
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens pLM->params.max_fcoe_task = lm_fc_max_fcoe_task_sup(pLM);
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens /* enable rate shaping */
beb562835cfbfcc73ae96a39ad1ef3e0446d299cShampavman pMem = (BnxeMemRegion *)d_list_peek_head(&pUM->memRegionList);
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens pMem = (BnxeMemRegion *)d_list_next_entry(D_LINK_CAST(pMem));
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens //int numRegs;
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens * Solaris identifies:
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens * BAR 0 - size 0 (pci config regs?)
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens * BAR 1 - size 0x800000 (Everest 1/2 LM BAR 0)
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens * BAR 2 - size 0x4000000 (Everest 1 LM BAR 1)
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens * 0x800000 (Everest 2 LM BAR 1)
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens * BAR 3 - size 0x10000 (Everest 2 LM BAR 2)
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens //ddi_dev_nregs(pUM->pDev, &numRegs);
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens if ((size > regSize) || BnxeIsBarUsed(pUM, bar, 0, size))
614409b5be5411058e7e9b6cc93dddaff9fb13f7ahrens BnxeLogWarn(pUM, "BAR %d at offset %d and size %d is already being used!",
fa9e4066f08beec538e775443c5be79dd423fcabahrens if ((pMem = kmem_zalloc(sizeof(BnxeMemRegion), KM_NOSLEEP)) == NULL)
b24ab6762772a3f6a89393947930c7fa61306783Jeff Bonwick BnxeLogWarn(pUM, "Memory allocation for BAR %d at offset %d and size %d failed!",
fa9e4066f08beec538e775443c5be79dd423fcabahrens 0, // region map offset,
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogWarn(pUM, "Failed to memory map device (BAR=%d, offset=%d, size=%d) (%d)",
b24ab6762772a3f6a89393947930c7fa61306783Jeff Bonwick d_list_push_head(&pUM->memRegionList, D_LINK_CAST(pMem));
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* see bar mapping described in mm_map_io_base above */
fa9e4066f08beec538e775443c5be79dd423fcabahrens if ((size > regSize) || BnxeIsBarUsed(pUM, bar, offset, size))
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogWarn(pUM, "BAR %d at offset %d and size %d is already being used!",
fa9e4066f08beec538e775443c5be79dd423fcabahrens if ((pMem = kmem_zalloc(sizeof(BnxeMemRegion), KM_NOSLEEP)) == NULL)
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogWarn(pUM, "Memory allocation for BAR %d at offset %d and size %d failed!",
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogWarn(pUM, "Failed to memory map device (BAR=%d, offset=%d, size=%d) (%d)",
fa9e4066f08beec538e775443c5be79dd423fcabahrens d_list_push_head(&pUM->memRegionList, D_LINK_CAST(pMem));
fa9e4066f08beec538e775443c5be79dd423fcabahrens pMemRegion = (BnxeMemRegion *)d_list_peek_head(&pUM->memRegionList);
fa9e4066f08beec538e775443c5be79dd423fcabahrens d_list_remove_entry(&pUM->memRegionList, D_LINK_CAST(pMemRegion));
fa9e4066f08beec538e775443c5be79dd423fcabahrens pMemRegion = (BnxeMemRegion *)d_list_next_entry(D_LINK_CAST(pMemRegion));
fa9e4066f08beec538e775443c5be79dd423fcabahrens const char * sz_file,
fa9e4066f08beec538e775443c5be79dd423fcabahrens const unsigned long line,
fa9e4066f08beec538e775443c5be79dd423fcabahrens if ((pMem = kmem_zalloc(sizeof(BnxeMemBlock), KM_NOSLEEP)) == NULL)
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* allocated space for header/trailer checks */
fa9e4066f08beec538e775443c5be79dd423fcabahrens if ((pBuf = kmem_zalloc(memSize, KM_NOSLEEP)) == NULL)
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* fill in the header check */
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* fill in the trailer check */
fa9e4066f08beec538e775443c5be79dd423fcabahrens for (i = 0, pTmp = (u32_t *)((char *)pBuf + memSize - BNXE_MEM_CHECK_LEN);
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens snprintf(pMem->fileName, sizeof(pMem->fileName), "%s", sz_file);
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens d_list_push_head(&pUM->memBlockList, D_LINK_CAST(pMem));
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens MEM_LOG(pUM, "Allocated %d byte block virt:%p",
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens memSize, ((char *)pBuf + BNXE_MEM_CHECK_LEN));
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrensvoid * mm_alloc_phys_mem_align_imp(lm_device_t * pLM,
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens const unsigned long line,
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens if ((pMem = kmem_zalloc(sizeof(BnxeMemDma), KM_NOSLEEP)) == NULL)
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens MEM_LOG(pUM, "*** DMA: %8u (%4d) - %8u", memSize, alignment, size);
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens BnxeLogWarn(pUM, "Failed to alloc DMA handle");
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens BnxeLogWarn(pUM, "Failed to alloc DMA memory");
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens if ((rc = ddi_dma_addr_bind_handle(*pDmaHandle,
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens (struct as *)0,
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens BnxeLogWarn(pUM, "Failed to bind DMA address");
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens /* save the virtual memory address so we can get the dma_handle later */
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens snprintf(pMem->fileName, sizeof(pMem->fileName), "%s", sz_file);
3f1f80124f2b2b91c4c06303305e5badae5228e8Matthew Ahrens MEM_LOG(pUM, "*** DMA: virt %p / phys 0x%0llx (%d/%d)",
fa9e4066f08beec538e775443c5be79dd423fcabahrens (!((u32_t)pPhysAddr->as_ptr % (u32_t)alignment) ? 1 : 0));
fa9e4066f08beec538e775443c5be79dd423fcabahrens d_list_push_head(&pUM->memDmaList, D_LINK_CAST(pMem));
fa9e4066f08beec538e775443c5be79dd423fcabahrens MEM_LOG(pUM, "Allocated %d sized DMA block phys:%p virt:%p",
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* Zero memory! */
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* make sure the new contents are flushed back to main memory */
fa9e4066f08beec538e775443c5be79dd423fcabahrens ddi_dma_sync(*pDmaHandle, 0, length, DDI_DMA_SYNC_FORDEV);
fa9e4066f08beec538e775443c5be79dd423fcabahrens const char * sz_file,
fa9e4066f08beec538e775443c5be79dd423fcabahrens const unsigned long line,
fa9e4066f08beec538e775443c5be79dd423fcabahrens return mm_alloc_phys_mem_align_imp(pLM, memSize, pPhysAddr,
fa9e4066f08beec538e775443c5be79dd423fcabahrens const char * sz_file,
fa9e4066f08beec538e775443c5be79dd423fcabahrens const unsigned long line,
fa9e4066f08beec538e775443c5be79dd423fcabahrens return mm_alloc_mem_imp(pDev, memSize, sz_file, line, cli_idx);
fa9e4066f08beec538e775443c5be79dd423fcabahrens const char * sz_file,
fa9e4066f08beec538e775443c5be79dd423fcabahrens const unsigned long line,
fa9e4066f08beec538e775443c5be79dd423fcabahrens return mm_alloc_phys_mem_imp(pDev, memSize, pPhysAddr, flushType,
fa9e4066f08beec538e775443c5be79dd423fcabahrens pMem = (BnxeMemBlock *)d_list_peek_head(&pUM->memBlockList);
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens /* adjuest for header/trailer checks */
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* verify header check */
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogWarn(pUM, "Header overflow! (%p/%u)", pBuf, memSize);
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* verify trailer check */
fa9e4066f08beec538e775443c5be79dd423fcabahrens for (i = 0, pTmp = (u32_t *)((char *)pBuf + memSize - BNXE_MEM_CHECK_LEN);
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogWarn(pUM, "Trailer overflow! (%p/%u)", pBuf, memSize);
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* Uh-Oh! */
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogWarn(pUM, "Attempt to free memory block with invalid size (%d/%d)",
fa9e4066f08beec538e775443c5be79dd423fcabahrens d_list_remove_entry(&pUM->memBlockList, D_LINK_CAST(pMem));
fa9e4066f08beec538e775443c5be79dd423fcabahrens pMem = (BnxeMemBlock *)d_list_next_entry(D_LINK_CAST(pMem));
fa9e4066f08beec538e775443c5be79dd423fcabahrens pMem = (BnxeMemDma *)d_list_peek_head(&pUM->memDmaList);
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling /* Uh-Oh! */
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling BnxeLogWarn(pUM, "Attempt to free DMA memory with invalid size (%d/%d)",
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling d_list_remove_entry(&pUM->memDmaList, D_LINK_CAST(pMem));
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling pMem = (BnxeMemDma *)d_list_next_entry(D_LINK_CAST(pMem));
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling const void * pSrc,
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling BnxeTxPktsReclaim((um_device_t *)pLM, idx, packet_list);
3f9d6ad73e45c6823b409f93b0c8d4f62861d2d5Lin Ling BnxeLogInfo(pUM, "RAMROD on cid %d cmd is done", cid);
44cb6abc89aa591c23f5e58296c6d2a29302344abmc /* XXX probably need a memory pool to pull from... */
91ebeef555ce7f899b6270a3c2df47b51f7ad59aahrens mm_rt_free_mem(pDev, pPending, sizeof(struct sq_pending_command),
44cb6abc89aa591c23f5e58296c6d2a29302344abmcstruct sq_pending_command * mm_get_sq_pending_command(lm_device_t * pDev)
91ebeef555ce7f899b6270a3c2df47b51f7ad59aahrens /* XXX probably need a memory pool to pull from... */
91ebeef555ce7f899b6270a3c2df47b51f7ad59aahrens return mm_rt_alloc_mem(pDev, sizeof(struct sq_pending_command),
44cb6abc89aa591c23f5e58296c6d2a29302344abmc //um_device_t * pUM = (um_device_t *)pDev;
91ebeef555ce7f899b6270a3c2df47b51f7ad59aahrens /* reset the link status */
91ebeef555ce7f899b6270a3c2df47b51f7ad59aahrens /* reset the link partner status */
91ebeef555ce7f899b6270a3c2df47b51f7ad59aahrens if (pUM->lm_dev.vars.flow_control & LM_FLOW_CONTROL_RECEIVE_PAUSE)
fa9e4066f08beec538e775443c5be79dd423fcabahrens if (pUM->lm_dev.vars.flow_control & LM_FLOW_CONTROL_TRANSMIT_PAUSE)
fa9e4066f08beec538e775443c5be79dd423fcabahrens if ((GET_MEDIUM_SPEED(medium) >= LM_MEDIUM_SPEED_SEQ_START) &&
fa9e4066f08beec538e775443c5be79dd423fcabahrens (GET_MEDIUM_SPEED(medium) <= LM_MEDIUM_SPEED_SEQ_END))
fa9e4066f08beec538e775443c5be79dd423fcabahrens pUM->props.link_speed = (((GET_MEDIUM_SPEED(medium) >> 8) -
fa9e4066f08beec538e775443c5be79dd423fcabahrens snprintf(tbuf, TBUF_SIZE, "%u", pUM->props.link_speed);
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogInfo(pUM, "%s Duplex Rx Flow %s Tx Flow %s Link Up",
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogInfo(pUM, "%s %s Duplex Rx Flow %s Tx Flow %s Link Up",
fa9e4066f08beec538e775443c5be79dd423fcabahrens /* ignore link status if it has not changed since the last indicate */
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogWarn(pUM, "FCoE Client bound and pDev is NULL (LINK STATUS failed!) %s@%s",
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogWarn(pUM, "FCoE Client bound and cliCtl is NULL (LINK STATUS failed!) %s@%s",
ccae0b50330edda9b094cee1ec6a0ad35443e8b0eschrock BnxeWorkQueueAddDelayNoCopy(pUM, (void (*)(um_device_t *, void *))task, param, delay_ms);
3d7072f8bd27709dba14f6fe336f149d25d9e207eschrock BnxeWorkQueueAddGeneric(pUM, (void (*)(um_device_t *))func);
1195e687f1c03c8d57417b5999578922e20a3554Mark J Musantevoid MM_RELEASE_REQUEST_LOCK_IMP(lm_device_t * pDev)
fa9e4066f08beec538e775443c5be79dd423fcabahrenslm_status_t mm_acquire_lock(mm_spin_lock_t * spinlock)
fa9e4066f08beec538e775443c5be79dd423fcabahrenslm_status_t mm_release_lock(mm_spin_lock_t * spinlock)
fa9e4066f08beec538e775443c5be79dd423fcabahrensvoid MM_ACQUIRE_ISLES_CONTROL_LOCK_IMP(lm_device_t * pDev)
fa9e4066f08beec538e775443c5be79dd423fcabahrensvoid MM_RELEASE_ISLES_CONTROL_LOCK_IMP(lm_device_t * pDev)
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrensvoid MM_ACQUIRE_ISLES_CONTROL_LOCK_DPC_IMP(lm_device_t * pDev)
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrensvoid MM_RELEASE_ISLES_CONTROL_LOCK_DPC_IMP(lm_device_t * pDev)
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrensvoid MM_ACQUIRE_SP_REQ_MGR_LOCK_IMP(lm_device_t * pDev)
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrensvoid MM_RELEASE_SP_REQ_MGR_LOCK_IMP(lm_device_t * pDev)
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrensvoid MM_ACQUIRE_SB_LOCK_IMP(lm_device_t * pDev, u8_t sb_idx)
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrensvoid MM_RELEASE_SB_LOCK_IMP(lm_device_t * pDev, u8_t sb_idx)
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens unsigned int size,
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens unsigned int crc)
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens unsigned int size,
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens unsigned short crc)
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrenslm_status_t mm_event_log_generic_arg_fwd(lm_device_t * pDev,
fa9e4066f08beec538e775443c5be79dd423fcabahrens case LM_LOG_ID_UNQUAL_IO_MODULE: // SFP+ unqualified io module
fa9e4066f08beec538e775443c5be79dd423fcabahrens * expected parameters:
fa9e4066f08beec538e775443c5be79dd423fcabahrens * u8 port, const char * vendor_name, const char * vendor_pn
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogInfo(pUM, "Unqualified IO Module: %s %s (port=%d)",
fa9e4066f08beec538e775443c5be79dd423fcabahrens case LM_LOG_ID_OVER_CURRENT: // SFP+ over current power
ecc2d604e885a75cc75e647b5641af99d5a6f4a6bonwick * expected parametrs:
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens BnxeLogWarn(pUM, "SFP+ over current, power failure! (port=%d)", port);
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens case LM_LOG_ID_NO_10G_SUPPORT: // 10g speed is requested but not supported
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens * expected parametrs:
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens BnxeLogWarn(pUM, "10Gb speed not supported! (port=%d)", port);
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens * expected parametrs:
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens BnxeLogWarn(pUM, "PHY uninitialized! (port=%d)", port);
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens BnxeLogWarn(pUM, "MDIO access timeout! (port=%d)", port);
fa9e4066f08beec538e775443c5be79dd423fcabahrens BnxeLogWarn(pUM, "Unknown MM event log! (type=%d)", lm_log_id);
fa9e4066f08beec538e775443c5be79dd423fcabahrens lm_status = mm_event_log_generic_arg_fwd(pDev, lm_log_id, argp);
fa9e4066f08beec538e775443c5be79dd423fcabahrens return min(strlen((char *)pDev->ver_str), strlen(pUM->version));
fa9e4066f08beec538e775443c5be79dd423fcabahrens (uint8_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] +
5f5f7a6f9c8e9c1587a54e690556d756ec67558cahrens (uint16_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] +
fa9e4066f08beec538e775443c5be79dd423fcabahrens (uint32_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] +
fa9e4066f08beec538e775443c5be79dd423fcabahrens (uint64_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] +
fa9e4066f08beec538e775443c5be79dd423fcabahrens (uint8_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] + offset),
fa9e4066f08beec538e775443c5be79dd423fcabahrens (uint16_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] + offset),
ec9f632e53cc822267588170e45d89b9dc72153fEric Schrockvoid mm_bar_write_dword(struct _lm_device_t *pdev,
ec9f632e53cc822267588170e45d89b9dc72153fEric Schrock (uint32_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] + offset),
ec9f632e53cc822267588170e45d89b9dc72153fEric Schrockvoid mm_bar_write_ddword(struct _lm_device_t *pdev,
ec9f632e53cc822267588170e45d89b9dc72153fEric Schrock (uint64_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] + offset),
ec9f632e53cc822267588170e45d89b9dc72153fEric Schrockvoid mm_bar_copy_buffer(struct _lm_device_t * pdev,
ec9f632e53cc822267588170e45d89b9dc72153fEric Schrock for (i = 0; i < size; i++)
ec9f632e53cc822267588170e45d89b9dc72153fEric Schrock (uint32_t *)((caddr_t)pdev->vars.mapped_bar_addr[bar] +
ec9f632e53cc822267588170e45d89b9dc72153fEric Schrocku32_t mm_get_cap_offset(struct _lm_device_t * pdev,
ec9f632e53cc822267588170e45d89b9dc72153fEric Schrock u32_t cap_offset = PCI_CAPABILITY_LIST; //CapPtr ofset
fa9e4066f08beec538e775443c5be79dd423fcabahrens lm_status_t lm_status = mm_read_pci(pdev, cap_offset, ®_value);
fa9e4066f08beec538e775443c5be79dd423fcabahrens if ((lm_status == LM_STATUS_SUCCESS) && (reg_value != 0xFFFFFFFF)) {
c5904d138f3bdf0762dbf452a43d5a5c387ea6a8eschrock return 0xFFFFFFFF;
fa9e4066f08beec538e775443c5be79dd423fcabahrens return 0xFFFFFFFF;
c5904d138f3bdf0762dbf452a43d5a5c387ea6a8eschrock lm_status = mm_read_pci(pdev, cap_offset, ®_value);
fa9e4066f08beec538e775443c5be79dd423fcabahrens if ((lm_status == LM_STATUS_SUCCESS) && (reg_value != 0xFFFFFFFF)) {
088e9d477eee66081e407fbc5a33c4da25f66f6aeschrocku32_t mm_get_feature_flags(struct _lm_device_t * pdev)