/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2014 QLogic Corporation
* The contents of this file are subject to the terms of the
* QLogic End User License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the License at
* See the License for the specific language governing permissions
* and limitations under the License.
*/
/*
*/
#include "bnxe.h"
#ifdef BNXE_DEBUG_DMA_LIST
{
int i;
while (pTmp)
{
{
{
pTmp, i);
}
}
}
}
#endif /* BNXE_DEBUG_DMA_LIST */
{
int i, rc;
{
return B_TRUE;
}
/* fill out the indirection table */
for (i = 0; i < BNXE_RSS_INDIRECTION_TABLE_SIZE; i++)
{
}
/* seed the hash function with random data */
hashType = (LM_RSS_HASH_IPV4 |
NULL);
if (rc == LM_STATUS_PENDING)
{
{
}
}
else if (rc != LM_STATUS_SUCCESS)
{
}
}
{
int rc;
if (rc == LM_STATUS_PENDING)
{
{
}
}
else if (rc != LM_STATUS_SUCCESS)
{
}
}
{
int i;
{
case 1:
break;
case 2:
break;
case 3:
{
}
else
{
}
break;
default:
return 0;
}
{
*buf = 0;
{
}
else
{
}
{
}
else
{
}
{
}
else
{
}
{
}
else
{
}
{
}
else
{
" 1G");
}
{
}
else
{
" 2.5G");
}
{
}
else
{
" 10G");
}
{
}
else
{
" 20G");
}
*buf = 0;
{
" switch/1G");
break;
" switch/10G");
break;
break;
break;
default:
break;
}
{
break;
break;
break;
break;
break;
" speed/1G");
break;
" speed/2.5G");
break;
" speed/10G");
break;
" speed/20G");
break;
default:
break;
}
{
break;
break;
break;
break;
break;
default:
break;
}
}
{
*buf = 0;
{
{
}
else
{
}
}
{
{
}
else
{
}
}
{
{
}
else
{
}
}
{
{
}
else
{
}
}
{
{
" 1G");
}
else
{
}
}
{
{
" 10G");
}
else
{
}
}
{
{
" 20G");
}
else
{
}
}
{
{
if (medium)
{
BnxeLogWarn(pUM, "Phy autoneg requested along with other speeds, ignoring others and forcing autoneg");
}
" auto");
}
else
{
}
}
}
return medium;
}
{
int i;
{
*buf = 0;
{
{
" tx");
}
else
{
}
}
{
{
" rx");
}
else
{
}
}
{
/*
* This value can be or'ed with receive pause and transmit
* pause. If the auto-negotiation is disabled and the receive
* pause and transmit pause bits are set, then flow control is
* enabled regardless of link partner's flow control capability.
* Otherwise, if this bit is set, then flow is negotiated with
* the link partner. Values 0x80000000 and 0x80000003 are
* equivalent.
*/
{
" auto");
}
else
{
}
}
}
return flowctrl;
}
{
int rc;
{
}
0 /* pLM->params.selective_autoneg */,
0 /* pLM->params.wire_speed */,
0);
if (pUM->fmCapabilities &&
{
}
if (rc == LM_STATUS_SUCCESS)
{
}
else
{
}
#if 0
/*
* This is problematic. For non-PMF functions the lm_niv_vif_set for
* a link up will come very early and is queued for processing right
* after lm_chip_start. Thereafter setting the loopback mode brings
* the interface back down. Don't know if setting the loopback mode
* is even required when forcing it off. XXX
*/
{
}
#endif
}
/*
* (flag) TRUE = add, FALSE = remove
*
* This function must be called with BNXE_LOCK_ENTER_HWINIT held because this
* is shared between GLDv3 and FCoE entry points.
*/
int cliIdx,
{
int i, rc;
{
return EINVAL;
}
/* XXX */ LM_SET_CAM_NO_VLAN_FILTER,
if (rc == LM_STATUS_PENDING)
{
{
return ENOMEM;
}
}
{
return ENOMEM;
}
return 0;
}
/*
* This function is used to enable or disable multicast packet reception for
* particular multicast addresses. (flag) TRUE = add, FALSE = remove.
*
* This function must be called with BNXE_LOCK_ENTER_HWINIT held because this
* is shared between GLDv3 and FCoE entry points.
*/
int cliIdx)
{
{
return;
}
/* already holding BNXE_LOCK_ENTER_HWINIT */
{
{
}
}
else
{
{
}
}
}
int cliIdx,
const uint8_t * pMcastAddr,
{
int i, rc;
{
return EINVAL;
}
if (!pMcastAddr)
{
}
else
{
}
&pUM->mcast_fcoe;
{
/* adding a new address that isn't specified...? */
return EINVAL;
}
{
/* clear all multicast addresses */
while (d_list_entry_cnt(mcastList))
{
}
if (!hwSet)
{
return 0;
}
if (rc == LM_STATUS_PENDING)
{
{
return ENOMEM;
}
}
else if (rc != LM_STATUS_SUCCESS)
{
return ENOMEM;
}
return 0;
}
/* check if this address already exists in the table */
while (pTmp)
{
{
break;
}
}
if (flag)
{
/* only add the address if the table is empty or address not found */
{
KM_NOSLEEP)) == NULL)
{
return ENOMEM;
}
}
}
else /* (!flag) */
{
{
/* the address isn't in the table */
return ENXIO;
}
}
if (!hwSet)
{
return 0;
}
if (rc == LM_STATUS_PENDING)
{
{
return ENOMEM;
}
}
else if (rc != LM_STATUS_SUCCESS)
{
return ENOMEM;
}
return 0;
}
/*
* This function must be called with BNXE_LOCK_ENTER_HWINIT held because this
* is shared between GLDv3 and FCoE entry points.
*/
int cliIdx,
{
int rc;
{
return EINVAL;
}
if (rc == LM_STATUS_PENDING)
{
if ((rc =
{
return ENOMEM;
}
}
if (pUM->fmCapabilities &&
{
return ENOMEM;
}
if (rc != LM_STATUS_SUCCESS)
{
return ENOMEM;
}
return 0;
}
int cid)
{
int sb_id;
int rc;
//cliParams.lah_size = pUM->devParams.mtu[LM_CHAIN_IDX_CLI(pLM, cid)];
{
return B_FALSE;
}
/*********************************************************/
if (pUM->fmCapabilities &&
{
return B_FALSE;
}
if (pUM->fmCapabilities &&
{
return B_FALSE;
}
if (rc != LM_STATUS_SUCCESS)
{
return B_FALSE;
}
/*********************************************************/
if (pUM->fmCapabilities &&
{
return B_FALSE;
}
if (pUM->fmCapabilities &&
{
return B_FALSE;
}
if (rc != LM_STATUS_SUCCESS)
{
return B_FALSE;
}
return B_TRUE;
}
{
int rc;
{
return -1;
}
BnxeClientsHw(pUM));
if (BnxeHwStartCore(pUM))
{
goto BnxeHwStartFCOE_error;
}
if (!pUM->hwInitDone)
{
BnxeClientsHw(pUM));
goto BnxeHwStartFCOE_error;
}
/*********************************************************/
{
goto BnxeHwStartFCOE_error;
}
/*********************************************************/
{
goto BnxeHwStartFCOE_error;
}
/*********************************************************/
{
goto BnxeHwStartFCOE_error;
}
/*********************************************************/
{
goto BnxeHwStartFCOE_error;
}
{
goto BnxeHwStartFCOE_error;
}
/*********************************************************/
{
goto BnxeHwStartFCOE_error;
}
/*********************************************************/
{
goto BnxeHwStartFCOE_error;
}
/*********************************************************/
//| LM_RX_MASK_ACCEPT_ALL_MULTICAST
//| LM_RX_MASK_ACCEPT_BROADCAST
//| LM_RX_MASK_PROMISCUOUS_MODE
)) < 0)
{
goto BnxeHwStartFCOE_error;
}
/*********************************************************/
BnxeClientsHw(pUM));
return 0;
return -1;
}
{
BnxeClientsHw(pUM));
if (BnxeHwStartCore(pUM))
{
goto BnxeHwStartL2_error;
}
if (!pUM->hwInitDone)
{
BnxeClientsHw(pUM));
goto BnxeHwStartL2_error;
}
/*********************************************************/
{
{
goto BnxeHwStartL2_error;
}
}
/*********************************************************/
{
goto BnxeHwStartL2_error;
}
/*********************************************************/
{
goto BnxeHwStartL2_error;
}
{
goto BnxeHwStartL2_error;
}
/*********************************************************/
if (!BnxeRssEnable(pUM))
{
goto BnxeHwStartL2_error;
}
/*********************************************************/
/* use the hw programmed address (GLDv3 will overwrite if needed) */
{
{
}
else
{
}
}
{
goto BnxeHwStartL2_error;
}
/*********************************************************/
//| LM_RX_MASK_ACCEPT_ALL_MULTICAST
//| LM_RX_MASK_PROMISCUOUS_MODE
)) < 0)
{
goto BnxeHwStartL2_error;
}
/*********************************************************/
/*********************************************************/
/*
* Force a link update. Another client might already be up in which case
* the link status won't change during this plumb of the L2 client.
*/
BnxeClientsHw(pUM));
return 0;
/* XXX Need cleanup! */
return -1;
}
/* Must be called with BNXE_LOCK_ENTER_HWINIT taken! */
{
int rc;
if (pUM->hwInitDone)
{
/* already initialized */
BnxeClientsHw(pUM));
return 0;
}
BnxeClientsHw(pUM));
/*********************************************************/
/* reset the configuration to the hardware default */
/*********************************************************/
{
goto BnxeHwStartCore_error;
}
/*********************************************************/
if (pUM->fmCapabilities &&
{
goto BnxeHwStartCore_error;
}
if (pUM->fmCapabilities &&
{
goto BnxeHwStartCore_error;
}
if (rc != LM_STATUS_SUCCESS)
{
goto BnxeHwStartCore_error;
}
/*********************************************************/
if (BnxeIntrEnable(pUM))
{
goto BnxeHwStartCore_error;
}
/*********************************************************/
if (pUM->fmCapabilities &&
{
goto BnxeHwStartCore_error;
}
if (rc != LM_STATUS_SUCCESS)
{
goto BnxeHwStartCore_error;
}
/*********************************************************/
/*********************************************************/
/*********************************************************/
/*********************************************************/
/*********************************************************/
BnxeClientsHw(pUM));
return 0;
return -1;
}
{
int rc;
{
return;
}
BnxeClientsHw(pUM));
/*********************************************************/
/*********************************************************/
/*********************************************************/
{
}
/*********************************************************/
/*********************************************************/
/*********************************************************/
/*********************************************************/
/*********************************************************/
{
}
/*********************************************************/
/*********************************************************/
BnxeClientsHw(pUM));
}
{
BnxeClientsHw(pUM));
/*********************************************************/
/*********************************************************/
/*
* Reset the mac_addr to hw programmed default and then clear
* it in the firmware.
*/
{
#if 0
#else
LM_CLI_IDX_NDIS))) !=
{
}
#endif
}
/*********************************************************/
/*********************************************************/
/*********************************************************/
/*
* In Solaris when RX traffic is accepted, the system might generate and
* attempt to send some TX packets (from within gld_recv()!). Claiming any
* TX locks before this point would create a deadlock. The ISR would be
* waiting for a lock acquired here that would never be freed, since we
* in-turn would be waiting for the ISR to finish here. Consequently, we
* acquire the TX lock as soon as we know that no TX traffic is a result of
* RX traffic.
*/
/*********************************************************/
{
{
}
}
/*********************************************************/
/*********************************************************/
/*********************************************************/
/*********************************************************/
/*********************************************************/
/*********************************************************/
/*********************************************************/
BnxeClientsHw(pUM));
}
/* Must be called with BNXE_LOCK_ENTER_HWINIT taken! */
{
int rc;
if (!pUM->hwInitDone)
{
/* already finished? (should never get here) */
BnxeClientsHw(pUM));
return;
}
if (BnxeIsClientBound(pUM))
{
BnxeClientsHw(pUM));
return;
}
BnxeClientsHw(pUM));
/*********************************************************/
/*********************************************************/
/*********************************************************/
if (pUM->fmCapabilities &&
{
}
if (rc != LM_STATUS_SUCCESS)
{
}
/*********************************************************/
/*********************************************************/
if (pUM->fmCapabilities &&
{
}
if (pUM->fmCapabilities &&
{
}
/*********************************************************/
{
}
#ifndef BNXE_DEBUG_DMA_LIST
{
}
#else
{
int i;
while (pTmp)
{
{
}
}
}
#endif /* BNXE_DEBUG_DMA_LIST */
BnxeClientsHw(pUM));
}
{
int rc;
/* XXX Do we need it? */
if (pUM->fmCapabilities &&
{
return -1;
}
{
/* XXX
* Won't work under new model with multiple clients. Need an
*/
if (BnxeHwStartCore(pUM))
{
return -1;
}
}
return 0;
}
{
{
/* XXX
* Won't work under new model with multiple clients. Need an
*/
}
/* XXX proper lm_wake_up_mode_t when WOL supported */
if (pUM->fmCapabilities &&
{
return LM_STATUS_FAILURE;
}
if (pUM->fmCapabilities &&
{
return -1;
}
/* XXX proper lm_wake_up_mode_t when WOL supported */
if (pUM->fmCapabilities &&
{
return -1;
}
/* XXX Do we need it? */
if (pUM->fmCapabilities &&
{
return -1;
}
return 0;
}
#if (DEVO_REV > 3)
/*
* This is a non-blocking function to make sure no more interrupt and dma memory
* access of this hardware. We don't have to free any resource here.
*/
{
/* XXX temporary block until bnxef supports fast reboot... */
{
return -1;
}
#if 0
#endif
return 0;
}
#endif