d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * lm_l5st.h - L5 lm data structures
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* utility macros */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define SET_FIELD(fieldName, mask, newVal) ((fieldName) = (((fieldName) & ~mask) | (((newVal) << mask ## _SHIFT) & mask)))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define GET_FIELD(fieldName, mask) (((fieldName) & mask) >> mask ## _SHIFT)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define ISCSI_LICENSE_CONNECTION_LIMIT (0xffff) /* TODO: add iSCSI licensing support */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*This is needed because the BD chain has not been set yet*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* The number of bds (EQEs) per page including the last bd which is used as
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * a pointer to the next bd page. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define ISCSI_EQES_PER_PAGE(_is_next_ptr_needed) (USABLE_BDS_PER_PAGE(sizeof(struct iscsi_kcqe),_is_next_ptr_needed))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define FCOE_EQES_PER_PAGE(_is_next_ptr_needed) (USABLE_BDS_PER_PAGE(sizeof(struct fcoe_kcqe),_is_next_ptr_needed))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* offset within a EQ page of the next page address */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define NEXT_EQ_PAGE_ADDRESS_OFFSET (LM_PAGE_SIZE - sizeof(struct iscsi_kcqe))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* max number of eq chains, everst convention */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define MAX_EQ_CHAIN (ISCSI_NUM_OF_CQS*8) /* per function */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* max EQ pages limitation */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* The number of useable bds per page. This number does not include
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * the last bd at the end of the page. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi//#define MAX_EQ_BD_PER_PAGE ((u32_t) (ISCSI_EQES_PER_PAGE - 1))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define MAX_EQ_SIZE_FCOE(_is_next_ptr_needed) (MAX_EQ_PAGES * (FCOE_EQES_PER_PAGE(_is_next_ptr_needed) -1))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define MAX_EQ_SIZE_ISCSI(_is_next_ptr_needed) (MAX_EQ_PAGES * (ISCSI_EQES_PER_PAGE(_is_next_ptr_needed) -1))
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* number of bits to shift to edjeust the page_size from the kwqe_init2 to 0 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* layer mask value in the KCQEs */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi#define KCQE_FLAGS_LAYER_MASK_L6 (ISCSI_KWQE_LAYER_CODE<<4)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* pbl data */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t base_size; /* size allocated in bytes */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t pbl_size; /* size allocated in bytes */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t pbl_entries;/* number of entries in PBL */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi void *bd_chain_virt; /* virt addr of first page of the chain */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_address_t bd_chain_phy; /* phys addr of first page of the chain */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * iSCSI info that will be allocated in the bind phase.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This is the only parameters that stays valid when iscsi goes to hibernate.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t total_ofld; /* cyclic counter of number of offloaded tcp states */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t total_upld; /* cyclic counter of number of uploaded tcp states */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * iSCSI info that will be allocated in the bind phase.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * These parameters become not valid when iscsi goes to hibernate.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define LM_SC_EQ(_pdev, _idx) (_pdev)->iscsi_info.run_time.eq_chain[_idx]
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u8_t l5_eq_chain_cnt; /* number of L5 eq chains. currently equals num_of_cqs equals 1 */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u8_t l5_eq_base_chain_idx; /* L5 eq base chain Where do the L5 status block start */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t l5_eq_max_chain_cnt; /* registry param --> 32 bit */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define LM_SC_EQ_BASE_CHAIN_INDEX(pdev) ((pdev)->iscsi_info.run_time.l5_eq_base_chain_idx) /* that is first L5 SB */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define LM_SC_EQ_CHAIN_CNT(pdev) ((pdev)->iscsi_info.run_time.l5_eq_chain_cnt)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define LM_SC_MAX_CHAIN_CNT(pdev) ((pdev)->iscsi_info.run_time.l5_eq_max_chain_cnt)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* 'for loop' macros on L5 eq chains */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define LM_SC_FOREACH_EQ_IDX(pdev, eq_idx) \
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for ((eq_idx) = (pdev)->iscsi_info.run_time.l5_eq_base_chain_idx; (eq_idx) < (u32_t)((pdev)->iscsi_info.run_time.l5_eq_base_chain_idx + (pdev)->iscsi_info.run_time.l5_eq_chain_cnt); (eq_idx)++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * iSCSI info.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Paramters that stay valid in D3 and are allocated in bind time.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define LM_EQ_ADDR_SAVE_SC(_pdev, _idx) (_pdev)->iscsi_info.eq_addr_save.eq_addr[_idx]
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Paramters that are not valid in D3 and are allocated after bind time.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchitypedef union _lm_iscsi_slow_path_phys_data_t
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi struct iscsi_context iscsi_ctx; /* used by query slow path request */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi struct iscsi_update_ramrod_cached_params update_ctx; /* used by update slow path request */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_iscsi_slow_path_phys_data_t * virt_addr;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchitypedef struct _lm_iscsi_slow_path_request_t
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi lm_status_t status; /* request completion status */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u16_t iscsi_conn_id; /* Drivers connection ID. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi //iscsi_kwqe_t **pending_kwqes;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi struct iscsi_kwqe_conn_offload1 pending_ofld1;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi struct iscsi_kwqe_conn_offload2 pending_ofld2;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi struct iscsi_kwqe_conn_offload3 pending_ofld3;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* RAMRODs used for FCOE */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchitypedef union _lm_fcoe_slow_path_phys_data_t
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi struct fcoe_conn_offload_ramrod_params fcoe_ofld;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi struct fcoe_conn_enable_disable_ramrod_params fcoe_enable;
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u16_t fcoe_conn_id; /* Drivers connection ID. */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * FCoE info that will be allocated in the bind phase.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * This is the only parameters that stays valid when FCoE goes to hibernate.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/* pbl data */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u8_t allocated; /*For D3 case and better debugging*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t pbl_size; /* size allocated in bytes */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi u32_t pbl_entries;/* number of entries in PBL */
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define LM_FC_PBL(_pdev, _idx) ((_pdev)->fcoe_info.bind.pbl[_idx])
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi /* FCOE Miniport guarantees that they don't post more than once KWQE at a time,
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * so there's no need to allocate per-connection ramrod buffer, A single fcoe per-client
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * ramrod buffer (pdev->fcoe_info.bind.ramrod_mem_phys) can be used for all KWQEs.*/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * FCoE info that will be allocated in the bind phase.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi * These parameters become not valid when FCoE goes to hibernate.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define LM_FC_EQ(_pdev, _idx) (_pdev)->fcoe_info.run_time.eq_chain[_idx]
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define LM_FC_FOREACH_EQ_IDX(pdev, eq_idx) \
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi for ((eq_idx) = (pdev)->fcoe_info.run_time.fc_eq_base_chain_idx; (eq_idx) < (u32_t)((pdev)->fcoe_info.run_time.fc_eq_base_chain_idx + (pdev)->fcoe_info.run_time.num_of_cqs); (eq_idx)++)
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi/*******************************************************************************
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi ******************************************************************************/
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Paramters that stay valid in D3 and are allocated in bind time.
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi #define LM_EQ_ADDR_SAVE_FC(_pdev, _idx) (_pdev)->fcoe_info.eq_addr_save.eq_addr[_idx]
d14abf155341d55053c76eeec58b787a456b753bRobert Mustacchi // Paramters that are not valid in D3 and are allocated after bind time.