audioixp.h revision 68c47f65208790c466e5e484f2293d3baed71c6a
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2010 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _AUDIOIXP_H_
#define _AUDIOIXP_H_
/*
* Header file for the audioixp device driver
*/
#define IXP_DEV_CONFIG "onboard1"
#define IXP_DEV_VERSION "a"
/*
* Driver supported configuration information
*/
#define IXP_NAME "audioixp"
#define IXP_MOD_NAME "ATI IXP audio driver"
#define IXP_CONFIG_REGS (0) /* PCI configure register */
#define IXP_PLAY 0
#define IXP_REC 1
#define IXP_BD_NUMS (8)
/*
* PCI configuration registers and bits
*/
#define IXP_PCI_ID_200 (0x10024341U)
#define IXP_PCI_ID_300 (0x10024361U)
#define IXP_PCI_ID_400 (0x10024370U)
#define IXP_PCI_ID_SB600 (0x10024382U)
/*
* Audio controller registers and bits
*/
#define IXP_AUDIO_INT (0x00)
#define IXP_AUDIO_INT_IN_DMA_OVERFLOW (1U<<0)
#define IXP_AUDIO_INT_EN (0x04)
#define IXP_AUDIO_INT_EN_IN_DMA_OVERFLOW (1U<<0)
#define IXP_AUDIO_CMD (0x08)
#define IXP_AUDIO_CMD_POWER_DOWN (1U<<0)
#define IXP_AUDIO_OUT_PHY_ADDR_DATA (0x0c)
#define IXP_AUDIO_OUT_PHY_PRIMARY_CODEC (0u)
#define IXP_AUDIO_OUT_PHY_SECOND_CODEC (1u)
#define IXP_AUDIO_OUT_PHY_THIRD_CODEC (2u)
#define IXP_AUDIO_OUT_PHY_WRITE (0u)
#define IXP_AUDIO_OUT_PHY_ADDR_SHIFT (9)
#define IXP_AUDIO_OUT_PHY_DATA_SHIFT (16)
#define IXP_AUDIO_IN_PHY_ADDR_DATA (0x10)
#define IXP_AUDIO_IN_PHY_ADDR_SHIFT (9)
#define IXP_AUDIO_IN_PHY_DATA_SHIFT (16)
#define IXP_AUDIO_SLOTREQ (0x14)
#define IXP_AUDIO_COUNTER (0x18)
#define IXP_AUDIO_IN_FIFO_THRESHOLD (0x1c)
#define IXP_AUDIO_IN_DMA_LINK_P (0x20)
#define IXP_AUDIO_IN_DMA_LINK_P_EN (1u<<0)
#define IXP_AUDIO_IN_DMA_DT_START (0x24)
#define IXP_AUDIO_IN_DMA_DT_NEXT (0x28)
#define IXP_AUDIO_IN_DMA_DT_CUR (0x2c)
#define IXP_AUDIO_IN_DT_SIZE_FIFO_INFO (0x30)
#define IXP_AUDIO_OUT_DMA_SLOT_EN_THRESHOLD (0x34)
#define IXP_AUDIO_OUT_DMA_SLOT_3 (1U<<0)
#define IXP_AUDIO_OUT_DMA_THRESHOLD_SHIFT (11)
#define IXP_AUDIO_OUT_DMA_LINK_P (0x38)
#define IXP_AUDIO_OUT_DMA_LINK_P_EN (1U<<0)
#define IXP_AUDIO_OUT_DMA_DT_START (0x3c)
#define IXP_AUDIO_OUT_DMA_DT_NEXT (0x40)
#define IXP_AUDIO_OUT_DMA_DT_CUR (0x44)
#define IXP_AUDIO_OUT_DT_SIZE_USED_FREE (0x48)
#define IXP_AUDIO_SPDIF_CMD (0x4c)
#define IXP_AUDIO_SPDIF_LINK_P (0x50)
#define IXP_AUDIO_SPDIF_DT_START (0x54)
#define IXP_AUDIO_SPDIF_DT_NEXT (0x58)
#define IXP_AUDIO_SPDIF_DT_CUR (0x5c)
#define IXP_AUDIO_SPDIF_DT_SIZE_FIFO_INFO (0x60)
#define IXP_AUDIO_MODEM_MIRROR (0x7c)
#define IXP_AUDIO_AUDIO_MIRROR (0x80)
#define IXP_AUDIO_6CH_RECORDER_EN (0x84)
#define IXP_AUDIO_FIFO_FLUSH (0x88)
#define IXP_AUDIO_FIFO_FLUSH_OUT (1u<<0)
#define IXP_AUDIO_OUT_FIFO_INFO (0x8c)
#define IXP_AUDIO_SPDIF_STATUS_BITS_REG1 (0x90)
#define IXP_AUDIO_SPDIF_STATUS_BITS_REG2 (0x94)
#define IXP_AUDIO_SPDIF_STATUS_BITS_REG3 (0x98)
#define IXP_AUDIO_SPDIF_STATUS_BITS_REG4 (0x9c)
#define IXP_AUDIO_SPDIF_STATUS_BITS_REG5 (0xa0)
#define IXP_AUDIO_SPDIF_STATUS_BITS_REG6 (0xa4)
#define IXP_AUDIO_PHY_SEMA (0xa8)
/*
* AC97 status and link control registers are located
* in PCI configuration space.
*/
#define IXP_REG_GSR 0x40
#define IXP_REG_GCR 0x41
/* AC link interface status register */
#define IXP_GSR_PRI_READY 0x01
#define IXP_GSR_SEC_READY 0x04
#define IXP_GSR_TRI_READY 0x10
#define IXP_GSR_FOUR_READY 0x20
/* AC link interface control register */
#define IXP_GCR_ENAC97 0x80
#define IXP_GCR_RST 0x40
#define IXP_GCR_RSYNCHI 0x20
#define IXP_GCR_SDO 0x10
#define IXP_GCR_VSR 0x08
#define IXP_GCR_3D_AUDIO_CHANNEL 0x04
/*
* Macro for AD1980 codec
*/
#define AD1980_VID1 0x4144
#define AD1980_VID2 0x5370
#define AD1985_VID2 0x5375
struct audioixp_port {
int num;
struct audioixp_state *statep;
unsigned nframes;
unsigned fragfr;
unsigned fragsz;
unsigned sync_dir;
};
typedef struct audioixp_port audioixp_port_t;
/*
* buffer descriptor list entry, see datasheet
*/
struct audioixp_bd_entry {
};
typedef struct audioixp_bd_entry audioixp_bd_entry_t;
/*
* audioixp_state_t -per instance state and operation data
*/
struct audioixp_state {
};
typedef struct audioixp_state audioixp_state_t;
/*
* Useful bit twiddlers
*/
#endif /* _AUDIOIXP_H_ */