ath_hal.h revision 129d67acdc2d029d3d6cff4022c0c26c81c76f89
/*
* Copyright (c) 2002-2008 Sam Leffler, Errno Consulting, Atheros
* Communications, Inc. All rights reserved.
*
* Use is subject to license terms.
*
* Redistribution and use in source and binary forms are permitted
* provided that the following conditions are met:
* 1. The materials contained herein are unmodified and are used
* unmodified.
* 2. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following NO
* ''WARRANTY'' disclaimer below (''Disclaimer''), without
* modification.
* 3. Redistributions in binary form must reproduce at minimum a
* disclaimer similar to the Disclaimer below and any redistribution
* must be conditioned upon including a substantially similar
* Disclaimer requirement for further binary redistribution.
* 4. Neither the names of the above-listed copyright holders nor the
* names of any contributors may be used to endorse or promote
* product derived from this software without specific prior written
* permission.
*
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ''AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT,
* MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE
* FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGES.
*
*/
#ifndef _ATH_HAL_H
#define _ATH_HAL_H
/*
* ath_hal.h is released by Atheros and used to describe the Atheros
* Hardware Access Layer(HAL) interface. All kinds of data structures,
* constant definition, APIs declaration are defined here.Clients of
* the HAL call ath_hal_attach() to obtain a reference to an ath_hal
* structure for use with the device. Hardware-related operations that
* follow must call back into the HAL through interface, supplying the
* reference as the first parameter.
*/
#ifdef __cplusplus
extern "C" {
#endif
/* HAL version of this release */
/* HAL data type definition */
typedef void * HAL_BUS_TAG; /* opaque bus i/o id tag */
typedef void * HAL_BUS_HANDLE; /* opaque bus i/o handle */
typedef uint32_t HAL_BUS_ADDR;
#define CHANNEL_108A CHANNEL_T
#define CHANNEL_ALL \
/* privFlags */
/*
* Software use: channel interference used for AR as well as RADAR
* interference detection
*/
#define CHANNEL_INTERFERENCE 0x01
/* flags passed to tx descriptor setup methods */
/* flags passed to rx descriptor setup methods */
/* tx error flags */
/* bits found in ts_flags */
/* rx error flags */
/* bits found in rs_flags */
/* value found in rs_keyix to mark invalid entries */
/* value used to specify no encryption key for xmit */
/* compression definitions */
#define HAL_COMP_BUF_ALIGN_SIZE 512
#define HAL_ANTENNA_MIN_MODE 0
#define HAL_ANTENNA_FIXED_A 1
#define HAL_ANTENNA_FIXED_B 2
#define HAL_ANTENNA_MAX_MODE 3
/*
* Status codes that may be returned by the HAL. Note that
* interfaces that return a status code set it only when an
* error occurs--i.e. you cannot check it for success.
*/
typedef enum {
HAL_OK = 0, /* No error */
} HAL_STATUS;
typedef enum {
AH_FALSE = 0, /* NB: lots of code assumes false is zero */
AH_TRUE = 1
} HAL_BOOL;
typedef enum {
HAL_CAP_REG_DMN = 0, /* current regulatory domain */
/* support */
/* hardware can support TKIP MIC when WMM is turned on */
HAL_CAP_WME_TKIPMIC = 22,
/* hardware can support half rate channels */
HAL_CAP_CHAN_HALFRATE = 23,
/* hardware can support quarter rate channels */
HAL_CAP_CHAN_QUARTERRATE = 24,
/*
* "States" for setting the LED. These correspond to
* the possible 802.11 operational states and there may
* be a many-to-one mapping between these states and the
* actual hardware states for the LED's (i.e. the hardware
* may have fewer states).
*/
typedef enum {
HAL_LED_INIT = 0,
HAL_LED_SCAN = 1,
HAL_LED_AUTH = 2,
HAL_LED_ASSOC = 3,
HAL_LED_RUN = 4
/*
* each transmit queue in the hardware and to identify a set
*/
typedef enum {
HAL_TX_QUEUE_INACTIVE = 0, /* queue is inactive/unused */
} HAL_TX_QUEUE;
/*
* Transmit queue subtype. These map directly to
* WME Access Categories (except for UPSD). Refer
* to Table 5 of the WME spec.
*/
typedef enum {
HAL_WME_AC_BK = 0, /* background access category */
/*
* Transmit queue flags that control various
* operational parameters.
*/
typedef enum {
/*
* Per queue interrupt enables. When set the associated
* interrupt may be delivered for packets sent through
* the queue. Without these enabled no interrupts will
* be delivered for transmits through the queue.
*
* When 0x0001 is set, both TXQ_TXOKINT and TXQ_TXERRINT
* will be enabled.
*/
/*
* Enable hardware compression for packets sent through
* the queue. The compression buffer must be setup and
* packets must have a key entry marked in the tx descriptor.
*/
/*
* Disable queue when veol is hit or ready time expires.
* By default the queue is disabled only on reaching the
* physical end of queue (i.e. a null link ptr in the
* descriptor chain).
*/
HAL_TXQ_RDYTIME_EXP_POLICY_ENABLE = 0x0020,
/*
* Schedule frames on delivery of a DBA (DMA Beacon Alert)
* event. Frames will be transmitted only when this timer
* fires, e.g to transmit a beacon in ap or adhoc modes.
*/
/*
* Each transmit queue has a counter that is incremented
* each time the queue is enabled and decremented when
* the list of frames to transmit is traversed (or when
* the ready time for the queue expires). This counter
* must be non-zero for frames to be scheduled for
* transmission. The following controls disable bumping
* this counter under certain conditions. Typically this
* is used to gate frames based on the contents of another
* queue (e.g. CAB traffic may only follow a beacon frame).
* These are meaningful only when frames are scheduled
* with a non-ASAP policy (e.g. DBA-gated).
*/
/*
* Fragment burst backoff policy. Normally no backoff
* is done after a successful transmission, the next fragment
* is sent at SIFS. If this flag is set backoff is done
* after each fragment, regardless whether it was ack'd or
* not, after the backoff count reaches zero a normal channel
* access procedure is done before the next transmit (i.e.
* wait AIFS instead of SIFS).
*/
HAL_TXQ_FRAG_BURST_BACKOFF_ENABLE = 0x00800000,
/*
* Disable post-tx backoff following each frame.
*/
/*
* DCU arbiter lockout control. This controls how
* lower priority tx queues are handled with respect
* to a specific queue when multiple queues have frames
* to send. No lockout means lower priority queues arbitrate
* concurrently with this queue. Intra-frame lockout
* means lower priority queues are locked out until the
* current frame transmits (e.g. including backoffs and bursting).
* Global lockout means nothing lower can arbitrary so
* long as there is traffic activity on this queue (frames,
* backoff, etc).
*/
typedef struct {
} HAL_TXQ_INFO;
#define HAL_TQI_NONVAL 0xffff
/* token to use for aifs, cwmin, cwmax */
/*
* Transmit packet types. This belongs in ah_desc.h, but
* is here so we can give a proper type to various parameters
* (and not require everyone include the file).
*
* NB: These values are intentionally assigned for
* direct use when setting up h/w descriptors.
*/
typedef enum {
HAL_PKT_TYPE_NORMAL = 0,
HAL_PKT_TYPE_ATIM = 1,
HAL_PKT_TYPE_PSPOLL = 2,
HAL_PKT_TYPE_BEACON = 3,
HAL_PKT_TYPE_CHIRP = 5,
} HAL_PKT_TYPE;
/* Rx Filter Frame Types */
typedef enum {
typedef enum {
HAL_PM_AWAKE = 0,
HAL_PM_FULL_SLEEP = 1,
HAL_PM_NETWORK_SLEEP = 2,
HAL_PM_UNDEFINED = 3
/*
* NOTE WELL:
* These are mapped to take advantage of the common locations for many of
* the bits on all of the currently supported MAC chips. This is to make
* the ISR as efficient as possible, while still abstracting HW differences.
* When new hardware breaks this commonality this enumerated type, as well
* as the HAL functions using it, must be modified. All values are directly
* mapped unless commented otherwise.
*/
typedef enum {
HAL_INT_RXDESC = 0x00000002,
HAL_INT_RXNOFRM = 0x00000008,
HAL_INT_RXEOL = 0x00000010,
HAL_INT_RXORN = 0x00000020,
HAL_INT_TXDESC = 0x00000080,
HAL_INT_TXURN = 0x00000800,
HAL_INT_MIB = 0x00001000,
HAL_INT_RXPHY = 0x00004000,
HAL_INT_RXKCM = 0x00008000,
HAL_INT_SWBA = 0x00010000,
HAL_INT_BMISS = 0x00040000,
HAL_INT_GPIO = 0x01000000,
| HAL_INT_GPIO,
} HAL_INT;
typedef enum {
HAL_RFGAIN_INACTIVE = 0,
} HAL_RFGAIN;
typedef enum {
HAL_PHYERR_UNDERRUN = 0, /* Transmit underrun */
/* NB: these are specific to the 5212 */
/*
* Channels are specified by frequency.
*/
typedef struct {
} HAL_CHANNEL;
typedef struct {
enum {
CTRY_DEFAULT = 0 /* default country code */
};
enum {
HAL_MODE_11NG_HT20 = 0x8000,
HAL_MODE_11NA_HT20 = 0x10000,
HAL_MODE_11NG_HT40PLUS = 0x20000,
HAL_MODE_11NG_HT40MINUS = 0x40000,
HAL_MODE_11NA_HT40PLUS = 0x80000,
HAL_MODE_11NA_HT40MINUS = 0x100000,
HAL_MODE_ALL = 0xffffff
};
typedef struct {
int rateCount; /* NB: for proper padding */
struct {
/* mask for enabling short preamble in CCK rate code */
/* value for supported rates info element of MLME */
/* index of next lower basic rate; used for dur. calcs */
} info[32];
typedef struct {
} HAL_RATE_SET;
/*
* 802.11n specific structures and enums
*/
typedef enum {
typedef struct {
typedef enum {
HAL_HT_MACMODE_20 = 0, /* 20 MHz operation */
typedef enum {
HAL_HT_PHYMODE_20 = 0, /* 20 MHz operation */
typedef enum {
HAL_HT_EXTPROTSPACING_20 = 0, /* 20 MHz spacing */
typedef enum {
/*
* Antenna switch control. By default antenna selection
* enables multiple (2) antenna use. To force use of the
* A or B antenna only specify a fixed setting. Fixing
* the antenna will also disable any diversity support.
*/
typedef enum {
HAL_ANT_VARIABLE = 0, /* variable by programming */
typedef enum {
HAL_M_IBSS = 0, /* IBSS (adhoc) station */
} HAL_OPMODE;
typedef struct {
} HAL_KEYVAL;
typedef enum {
HAL_CIPHER_WEP = 0,
HAL_CIPHER_AES_OCB = 1,
HAL_CIPHER_AES_CCM = 2,
HAL_CIPHER_CKIP = 3,
HAL_CIPHER_TKIP = 4,
} HAL_CIPHER;
enum {
HAL_SLOT_TIME_9 = 9,
HAL_SLOT_TIME_20 = 20
};
/*
* Per-station beacon timer state. Note that the specified
* beacon interval (given in TU's) can also include flags
* to force a TSF reset and to enable the beacon xmit logic.
* If bs_cfpmaxduration is non-zero the hardware is setup to
* coexist with a PCF-capable AP.
*/
typedef struct {
/*
* Like HAL_BEACON_STATE but for non-station mode setup.
* NB: see above flag definitions
*/
typedef struct {
#define HAL_BEACON_TBTT_EN 0x00000001
#define HAL_BEACON_DBA_EN 0x00000002
#define HAL_BEACON_SWBA_EN 0x00000004
/*
* Per-node statistics maintained by the driver for use in
* optimizing signal quality and other operational aspects.
*/
typedef struct {
/*
* Transmit descriptor status. This structure is filled
* in only after the tx descriptor process method finds a
* ``done'' descriptor; at which point it returns something
* other than HAL_EINPROGRESS.
*
* Note that ts_antenna may not be valid for all h/w. It
* should be used only if non-zero.
*/
struct ath_tx_status {
/* AH_SUPPORT_AR5416 */ /* 802.11n status */
};
/*
* Receive descriptor status. This structure is filled
* in only after the rx descriptor process method finds a
* ``done'' descriptor; at which point it returns something
* other than HAL_EINPROGRESS.
*
* If rx_status is zero, then the frame was received ok;
* otherwise the error information is indicated and rs_phyerr
* contains a phy error code if HAL_RXERR_PHY is set. In general
* the frame contents is undefined when an error occurred thought
* for some errors (e.g. a decryption error), it may be meaningful.
*
* Note that the receive timestamp is expanded using the TSF to
* at least 15 bits (regardless of what the h/w provides directly).
* Newer hardware supports a full 32-bits; use HAL_CAP_32TSTAMP to
* find out if the hardware is capable.
*
* rx_rssi is in units of dbm above the noise floor. This value
* is measured during the preamble and PLCP; i.e. with the initial
* 4us of detection. The noise floor is typically a consistent
* -96dBm absolute power in a 20MHz channel.
*/
struct ath_rx_status {
/* AH_SUPPORT_AR5416 */ /* 802.11n status */
};
/*
* the Atheros HAL. This definition obscures hardware-specific
* details from the driver. Drivers are expected to fillin the
* portions of a descriptor that are not opaque then use HAL calls
* to complete the work. Status for completed frames is returned
* in a device-independent format.
*/
/* AH_SUPPORT_AR5416 */
#define HAL_DESC_HW_SIZE 20
#pragma pack(1)
struct ath_desc {
/*
* The following definitions are passed directly
* the hardware and managed by the HAL. Drivers
* should not touch those elements marked opaque.
*/
};
struct ath_desc_status {
union {
} ds_us;
};
#pragma pack()
/*
* Hardware Access Layer (HAL) API.
*
* Clients of the HAL call ath_hal_attach to obtain a reference to an
* ath_hal structure for use with the device. Hardware-related operations
* that follow must call back into the HAL through interface, supplying
* the reference as the first parameter. Note that before using the
* reference returned by ath_hal_attach the caller should verify the
* ABI version number.
*/
struct ath_hal {
/* NB: when only one radio is present the rev is in 5Ghz */
/* Reset functions */
HAL_STATUS *status);
void (*ah_setPCUConfig) (struct ath_hal *);
HAL_BOOL *);
/* DFS support */
/* Transmit functions */
const HAL_TXQ_INFO *qInfo);
const HAL_TXQ_INFO *qInfo);
struct ath_tx_status *);
/* Receive Functions */
void (*ah_enableReceive) (struct ath_hal *);
void (*ah_startPcuReceive) (struct ath_hal *);
void (*ah_stopPcuReceive) (struct ath_hal *);
void (*ah_setMulticastFilter) (struct ath_hal *,
void (*ah_rxMonitor) (struct ath_hal *,
const HAL_NODE_STATS *, HAL_CHANNEL *);
void (*ah_procMibEvent) (struct ath_hal *,
const HAL_NODE_STATS *);
/* Misc Functions */
uint16_t, HAL_STATUS *);
void (*ah_writeAssocid) (struct ath_hal *,
void (*ah_resetTsf) (struct ath_hal *);
/* Key Cache Functions */
uint16_t, const HAL_KEYVAL *,
const uint8_t *, int);
/* Power Management Functions */
/* Beacon Management Functions */
void (*ah_setBeaconTimers) (struct ath_hal *,
const HAL_BEACON_TIMERS *);
/* NB: deprecated, use ah_setBeaconTimers instead */
void (*ah_beaconInit) (struct ath_hal *,
void (*ah_setStationBeaconTimers) (struct ath_hal *,
const HAL_BEACON_STATE *);
void (*ah_resetStationBeaconTimers) (struct ath_hal *);
/* Interrupt functions */
};
/*
* Check the PCI vendor ID and device ID against Atheros' values
* and return a printable description for any Atheros hardware.
* AH_NULL is returned if the ID's do not describe Atheros hardware.
*/
/*
* Attach the HAL for use with the specified device. The device is
* defined by the PCI device ID. The caller provides an opaque pointer
* to an upper-layer data structure (HAL_SOFTC) that is stored in the
* HAL state block for later use. Hardware register accesses are done
* using the specified bus tag and handle. On successful return a
* reference to a state block is returned that must be supplied in all
* subsequent HAL calls. Storage associated with this reference is
* dynamically allocated and must be freed by calling the ah_detach
* method when the client is done. If the attach operation fails a
* null (AH_NULL) reference will be returned and a status code will
* be returned if the status parameter is non-zero.
*/
/*
* Set the Vendor ID for Vendor SKU's which can modify the
* channel properties returned by ath_hal_init_channels.
* Return AH_TRUE if set succeeds
*/
/*
* Return a list of channels available for use with the hardware.
* The list is based on what the hardware is capable of, the specified
* country code, the modeSelect mask, and whether or not outdoor
* channels are to be permitted.
*
* The channel list is returned in the supplied array. maxchans
* defines the maximum size of this array. nchans contains the actual
* number of channels returned. If a problem occurred or there were
* no channels that met the criteria then AH_FALSE is returned.
*/
/*
* Calibrate noise floor data following a channel scan or similar.
* This must be called prior retrieving noise floor data.
*/
/*
* Return bit mask of wireless modes supported by the hardware.
*/
/*
* Calculate the transmit duration of a frame.
*/
/*
* Return if device is public safety.
*/
/*
* Return if device is operating in 900 MHz band.
*/
/*
* Convert between IEEE channel number and channel frequency
* using the specified channel flags; e.g. CHANNEL_2GHZ.
*/
/*
* Return a version string for the HAL release.
*/
extern char ath_hal_version[];
/*
* Return a NULL-terminated array of build/configuration options.
*/
extern const char *ath_hal_buildopts[];
/*
* Macros to encapsulated HAL functions.
*/
#define ATH_HAL_PHYDISABLE(_ah) \
(_status)))
#define ATH_HAL_INTRGET(_ah) \
#define ATH_HAL_INTRPEND(_ah) \
#define ATH_HAL_KEYCACHESIZE(_ah) \
#define ATH_HAL_GETRXFILTER(_ah) \
#define ATH_HAL_GETTSF32(_ah) \
#define ATH_HAL_GETTSF64(_ah) \
#define ATH_HAL_RESETTSF(_ah) \
#define ATH_HAL_RXENA(_ah) \
#define ATH_HAL_GETRXBUF(_ah) \
#define ATH_HAL_BEACONRESET(_ah) \
#define ATH_HAL_SETOPMODE(_ah) \
#define ATH_HAL_STOPPCURECV(_ah) \
#define ATH_HAL_STARTPCURECV(_ah) \
#define ATH_HAL_STOPDMARECV(_ah) \
#define ATH_HAL_DUMPSTATE(_ah) \
#define ATH_HAL_DUMPEEPROM(_ah) \
#define ATH_HAL_DUMPRFGAIN(_ah) \
#define ATH_HAL_DUMPANI(_ah) \
#define ATH_HAL_HASVEOL(_ah) \
#define ATH_HAL_GETRFGAIN(_ah) \
(_ath_desc)))
#define ATH_HAL_HASTKIPSPLIT(_ah) \
#define ATH_HAL_GETTKIPSPLIT(_ah) \
#define ATH_HAL_HASRFSILENT(ah) \
#define ATH_HAL_GETRFKILL(_ah) \
#if HAL_ABI_VERSION < 0x05120700
#define ATH_HAL_PROCESS_NOISEFLOOR(_ah)
#define HAL_CAP_TPC_ACK 100
#define HAL_CAP_TPC_CTS 101
#else
#endif
#if HAL_ABI_VERSION < 0x05122200
#endif
#ifdef __cplusplus
}
#endif
#endif /* _ATH_HAL_H */