arn_ani.c revision dd1de3740722a4b99a74005255effebbd20a6d70
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* Copyright (c) 2008 Atheros Communications Inc.
*
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "arn_core.h"
#include "arn_hw.h"
#include "arn_reg.h"
#include "arn_phy.h"
static int
{
int i;
return (i);
return (i);
}
}
"No more channel states left. Using channel 0\n"));
return (0);
}
static boolean_t
{
case ATH9K_ANI_NOISE_IMMUNITY_LEVEL: {
"ah->ah_sc, ATH_DBG_ANI",
"%s: level out of range (%u > %u)\n",
return (B_FALSE);
}
break;
}
m1ThreshLow[on]);
m2ThreshLow[on]);
m2CountThr[on]);
m2CountThrLow[on]);
m1ThreshLow[on]);
m2ThreshLow[on]);
if (on)
else
if (on)
else
}
break;
}
case ATH9K_ANI_CCK_WEAK_SIGNAL_THR: {
if (high)
else
/* LINT */
}
break;
}
case ATH9K_ANI_FIRSTEP_LEVEL: {
"%s: level out of range (%u > %u)\n",
(unsigned)ARRAY_SIZE(firstep)));
return (B_FALSE);
}
break;
}
case ATH9K_ANI_SPUR_IMMUNITY_LEVEL: {
const int cycpwrThr1[] =
{ 2, 4, 6, 8, 10, 12, 14, 16 };
"%s: level out of range (%u > %u)\n",
(unsigned)ARRAY_SIZE(cycpwrThr1)));
return (B_FALSE);
}
break;
}
case ATH9K_ANI_PRESENT:
break;
default:
return (B_FALSE);
}
"%s: ANI parameters:\n", __func__));
"noiseImmunityLevel=%d, spurImmunityLevel=%d, "
"ofdmWeakSigDetectOff=%d\n",
"cckWeakSigThreshold=%d, "
"firstepLevel=%d, listenTime=%d\n",
aniState->listenTime));
"cycleCount=%d, ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
return (B_TRUE);
}
static void
{
}
static void
{
struct ar5416AniState *aniState;
return;
aniState->listenTime = 0;
if (ahp->ah_hasHwPhyCounters) {
aniState->ofdmPhyErrBase = 0;
"OFDM Trigger is too high for hw counters\n"));
} else {
}
aniState->cckPhyErrBase = 0;
"CCK Trigger is too high for hw counters\n"));
} else {
}
"%s: Writing ofdmbase=%u cckbase=%u\n",
}
aniState->ofdmPhyErrCount = 0;
aniState->cckPhyErrCount = 0;
}
static void
{
struct ar5416AniState *aniState;
enum wireless_mode mode;
return;
return;
}
}
return;
}
}
}
return;
}
if (!aniState->ofdmWeakSigDetectOff) {
if (ath9k_hw_ani_control(ah,
B_FALSE)) {
(void) ath9k_hw_ani_control(ah,
return;
}
}
return;
}
if (aniState->ofdmWeakSigDetectOff)
(void) ath9k_hw_ani_control(ah,
B_TRUE);
return;
} else {
if (!aniState->ofdmWeakSigDetectOff)
(void) ath9k_hw_ani_control(ah,
B_FALSE);
if (aniState->firstepLevel > 0)
(void) ath9k_hw_ani_control(ah,
return;
}
}
}
static void
{
struct ar5416AniState *aniState;
enum wireless_mode mode;
return;
return;
}
}
}
return;
}
} else {
if (aniState->firstepLevel > 0)
(void) ath9k_hw_ani_control(ah,
}
}
}
static void
{
struct ar5416AniState *aniState;
if (aniState->firstepLevel > 0) {
return;
}
} else {
/* XXX: Handle me */
if (aniState->ofdmWeakSigDetectOff) {
if (ath9k_hw_ani_control(ah,
return;
}
if (aniState->firstepLevel > 0) {
if (ath9k_hw_ani_control(ah,
return;
}
} else {
if (aniState->firstepLevel > 0) {
if (ath9k_hw_ani_control(ah,
return;
}
}
}
if (aniState->spurImmunityLevel > 0) {
return;
}
if (aniState->noiseImmunityLevel > 0) {
return;
}
}
static int32_t
{
struct ar5416AniState *aniState;
listenTime = 0;
} else {
}
return (listenTime);
}
void
{
struct ar5416AniState *aniState;
int index;
/* For Lint Reasons */
return;
(void) ath9k_hw_ani_control(ah,
(void) ath9k_hw_ani_control(ah,
(void) ath9k_hw_ani_control
!ANI_USE_OFDM_WEAK_SIG /* !ATH9K_ANI_USE_OFDM_WEAK_SIG */);
}
return;
}
if (aniState->noiseImmunityLevel != 0)
if (aniState->spurImmunityLevel != 0)
if (aniState->ofdmWeakSigDetectOff)
(void) ath9k_hw_ani_control
if (aniState->cckWeakSigThreshold)
if (aniState->firstepLevel != 0)
if (ahp->ah_hasHwPhyCounters) {
} else {
}
}
/* ARGSUSED */
void
struct ath9k_channel *chan)
{
struct ar5416AniState *aniState;
if (listenTime < 0) {
return;
}
if (ahp->ah_hasHwPhyCounters) {
"%s: phyCnt1 0x%x, resetting "
"counter value to 0x%x\n",
}
"%s: phyCnt2 0x%x, resetting "
"counter value to 0x%x\n",
}
return;
}
}
return;
} else if (aniState->cckPhyErrCount >
}
}
}
{
}
void
{
"Enable MIB counters\n"));
}
void
{
"arn: ath9k_hw_disable_mib_counters(): "
"Disable MIB counters\n"));
}
{
"arn: ath9k_hw_GetMibCycleCountsPct(): "
"cycle counter wrap. ExtBusy = 0\n"));
good = 0;
} else {
if (cc_d != 0) {
} else {
good = 0;
}
}
return (good);
}
/*
* Process a MIB interrupt. We may potentially be invoked because
* here because a PHY error counter triggered.
*/
void
const struct ath9k_node_stats *stats)
{
/* Reset these counters regardless */
/* Clear the mib counters and save them in the stats */
return;
/* NB: these are not reset-on-read */
/* NB: only use ast_ani_*errs with AH_PRIVATE_DIAG */
/*
* NB: figure out which counter triggered. If both
* trigger we'll only deal with one as the processing
* clobbers the error counter so the trigger threshold
* check will never be true.
*/
/* NB: always restart to insure the h/w counters are reset */
}
}
void
{
int i;
for (i = 0; i < 5; i++) {
}
}
void
{
int i;
/* For Lint Reasons */
"Attach ANI\n"));
!ANI_USE_OFDM_WEAK_SIG /* !ATH9K_ANI_USE_OFDM_WEAK_SIG */;
if (ahp->ah_hasHwPhyCounters) {
}
}
if (ahp->ah_hasHwPhyCounters) {
"Setting OfdmErrBase = 0x%08x\n",
"Setting cckErrBase = 0x%08x\n",
}
}
void
{
"Detach ANI\n"));
if (ahp->ah_hasHwPhyCounters) {
}
}