aggr_dev.c revision c0192a574ab103def0adf824d9e22709b0d0fba9
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2006 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
/*
* IEEE 802.3ad Link Aggregation.
*/
#include <sys/sysmacros.h>
#include <sys/dld_impl.h>
#include <sys/aggr_impl.h>
/* module description */
#define AGGR_LINKINFO "Link Aggregation MAC"
#define AGGR_DRIVER_NAME "aggr"
/* device info ptr, only one for instance 0 */
static int aggr_close(queue_t *);
/*
* mi_hiwat is set to 1 because of the flow control mechanism implemented
* in dld. refer to the comments in dld_str.c for details.
*/
static struct module_info aggr_module_info = {
0,
0,
1,
0
};
NULL,
NULL,
NULL,
};
NULL,
NULL,
NULL,
};
/*
* Entry points for aggr control node
*/
static struct qinit aggr_w_ctl_qinit = {
NULL,
NULL,
NULL,
NULL,
};
static struct streamtab aggr_streamtab = {
};
static struct modldrv aggr_modldrv = {
&mod_driverops, /* Type of module. This one is a driver */
AGGR_LINKINFO, /* short description */
&aggr_dev_ops /* driver specific ops */
};
static struct modlinkage modlinkage = {
};
int
_init(void)
{
return (mod_install(&modlinkage));
}
int
_fini(void)
{
return (mod_remove(&modlinkage));
}
int
{
}
static int
{
return (EBUSY);
return (ENOSR);
/*
* The aggr control node uses its own set of entry points.
*/
qprocson(q);
return (0);
}
}
static int
aggr_close(queue_t *q)
{
qprocsoff(q);
return (0);
}
return (dld_close(q));
}
static void
{
aggr_ioctl(q, mp);
else
}
/*ARGSUSED*/
static int
void **result)
{
switch (infocmd) {
case DDI_INFO_DEVT2DEVINFO:
return (DDI_SUCCESS);
case DDI_INFO_DEVT2INSTANCE:
return (DDI_SUCCESS);
}
return (DDI_FAILURE);
}
static int
{
switch (cmd) {
case DDI_ATTACH:
if (ddi_get_instance(dip) != 0) {
/* we only allow instance 0 to attach */
return (DDI_FAILURE);
}
/* create minor node for control interface */
return (DDI_FAILURE);
}
return (DDI_SUCCESS);
case DDI_RESUME:
return (DDI_SUCCESS);
default:
return (DDI_FAILURE);
}
}
/*ARGSUSED*/
static int
{
switch (cmd) {
case DDI_DETACH:
if (aggr_grp_count() > 0)
return (DDI_FAILURE);
return (DDI_SUCCESS);
case DDI_SUSPEND:
return (DDI_SUCCESS);
default:
return (DDI_FAILURE);
}
}