8eea8e29cc4374d1ee24c25a07f45af132db3499ap * CDDL HEADER START
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * The contents of this file are subject to the terms of the
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * Common Development and Distribution License, Version 1.0 only
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8eea8e29cc4374d1ee24c25a07f45af132db3499ap * with the License.
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * See the License for the specific language governing permissions
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * and limitations under the License.
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * When distributing Covered Code, include this CDDL HEADER in each
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * If applicable, add the following below this CDDL HEADER, with the
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * fields enclosed by brackets "[]" replaced with your own identifying
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * information: Portions Copyright [yyyy] [name of copyright owner]
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * CDDL HEADER END
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * Copyright 2005 Sun Microsystems, Inc. All rights reserved.
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * Use is subject to license terms.
8eea8e29cc4374d1ee24c25a07f45af132db3499ap#pragma ident "%Z%%M% %I% %E% SMI"
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * dcam1394 driver. Control register access support.
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * dcam_reg_read
8eea8e29cc4374d1ee24c25a07f45af132db3499apdcam_reg_read(dcam_state_t *soft_state, dcam1394_reg_io_t *arg)
8eea8e29cc4374d1ee24c25a07f45af132db3499ap if (t1394_alloc_cmd(soft_state->sl_handle, 1, &cmdp) != DDI_SUCCESS) {
8eea8e29cc4374d1ee24c25a07f45af132db3499ap return (-1);
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * This delay should not be necessary, but was added for some
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * unknown reason. Should it ever be determined that it
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * is necessary, this delay should be reenabled.
8eea8e29cc4374d1ee24c25a07f45af132db3499ap if (t1394_read(soft_state->sl_handle, cmdp) != DDI_SUCCESS) {
8eea8e29cc4374d1ee24c25a07f45af132db3499ap return (-1);
8eea8e29cc4374d1ee24c25a07f45af132db3499ap return (-1);
8eea8e29cc4374d1ee24c25a07f45af132db3499ap /* perform endian adjustment */
8eea8e29cc4374d1ee24c25a07f45af132db3499ap cmdp->cmd_u.q.quadlet_data = T1394_DATA32(cmdp->cmd_u.q.quadlet_data);
8eea8e29cc4374d1ee24c25a07f45af132db3499ap return (0);
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * dcam_reg_write
8eea8e29cc4374d1ee24c25a07f45af132db3499apdcam_reg_write(dcam_state_t *soft_state, dcam1394_reg_io_t *arg)
8eea8e29cc4374d1ee24c25a07f45af132db3499ap if (t1394_alloc_cmd(soft_state->sl_handle, 0, &cmdp) != DDI_SUCCESS) {
8eea8e29cc4374d1ee24c25a07f45af132db3499ap return (-1);
8eea8e29cc4374d1ee24c25a07f45af132db3499ap /* perform endian adjustment */
8eea8e29cc4374d1ee24c25a07f45af132db3499ap * See the description in dcam_reg_read() above.
8eea8e29cc4374d1ee24c25a07f45af132db3499ap if (t1394_write(soft_state->sl_handle, cmdp) != DDI_SUCCESS) {
8eea8e29cc4374d1ee24c25a07f45af132db3499ap return (-1);
8eea8e29cc4374d1ee24c25a07f45af132db3499ap return (-1);
8eea8e29cc4374d1ee24c25a07f45af132db3499ap return (0);