hci1394_attach.c revision 7c478bd95313f5f23a4c958a745db2134aa03244
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2004 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
/*
* HBA attach() routine with associated funtions.
*/
/*
* Attach State Information. These states are used to track the status of the
* attach. They are bit offsets.
*/
#define STATE_ZALLOC 0
#define STATE_ISR_INIT 1
#define STATE_MINOR_NODE 2
#define STATE_HW_INIT 3
#define STATE_PHASE2 4
#define STATE_POWER_INIT 5
#define STATE_H1394_ATTACH 6
#define STATE_ISR_HANDLER 7
#define STATE_STARTUP 8
int
{
uint64_t attach_state = 0;
int instance;
int status;
switch (cmd) {
case DDI_ATTACH:
if (status != DDI_SUCCESS) {
"ddi_soft_state_zalloc() failed");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
if (soft_state == NULL) {
"ddi_get_soft_state() failed");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
/* get iblock cookie, other interrupt init stuff */
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
instance, DDI_NT_NEXUS, 0);
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
/* build up the reserved addresses map */
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
/* "attach" to the Services Layer */
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
/* free the reserved addresses map */
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
/* Report that driver was loaded */
/*
* Turn on link, Reset Bus, enable interrupts. Should be the
* last routine called in attach. The statebit for starup must
* be set before startup is called since startup enables
* interrupts.
*/
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
"");
return (DDI_SUCCESS);
case DDI_RESUME:
if (soft_state == NULL) {
"ddi_get_soft_state() failed");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
if (status != DDI_SUCCESS) {
"hardware failed to resume");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
/* tell the Services Layer that we are resuming */
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
/*
* set our state back to initial. The next bus reset were
* about to generate will set us in motion.
*/
/* turn on the link, enable interrupts, reset the bus */
if (status != DDI_SUCCESS) {
"hci1394_ohci_startup() failed");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
"");
return (DDI_SUCCESS);
default:
"");
break;
}
return (DDI_FAILURE);
}
/*
* hci1394_soft_state_phase1_init()
* First part soft_state initialization. This should be called before any
* other initialization routines are called. Anything that requires cleanup
* on detach or after an attach failure should be setup in phase2 init (i.e.
* mutex's, cv's, etc.)
*/
static void
int instance)
{
HCI1394_TNF_HAL_STACK, "");
/* current bus generation */
/* initialize statistics */
/* halinfo is what is passed up to the Services Layer */
HCI1394_TNF_HAL_STACK, "");
}
/*
* hci1394_soft_state_phase2_init()
* Second part of soft_state initialization. This should be called after a
* successful hardware_init() and before the call to h1394_attach().
*/
static void
{
HCI1394_TNF_HAL_STACK, "");
/*
* Setup our initial driver state. This requires the HW iblock
* cookie so this must be setup in phase2_init()
*/
/*
* halinfo.acc_attr tells the services layer what our buffer access
* attributes are. drvinfo.di_buf_attr it initialized in pci_init so
* this must be setup in phase2_init()
*/
/*
* halinfo.hw_interrupt tells the services layer what our
* iblock_cookie is. drvinfo.di_iblock_cookie is setup in isr_init so
* this must be setup in phase2_init()
*/
/*
* Read in our node capabilities. Since we are calling into csr
* we must have first called hardware_init(). Therefore, this must
* be in phase2_init().
*/
/*
* Read in our bus capabilities. Since we are calling into ohci
* we must have first called hardware_init(). Therefore, this must
* be in phase2_init().
*/
/*
* Setup our async command overhead. When a target driver or the ARREQ
* engine allocates a command, the services layer will tack on space
* for itself and the HAL so we do not have to manage memory for every
* command. hal_overhead is how much memory the hal requires to track
* an async command. Since we are calling into async we must have first
* called hardware_init(). Therefore, this must be in phase2_init().
*/
HCI1394_TNF_HAL_STACK, "");
}
/*
* hci1394_hardware_init()
* Initialize the adapter hardware. This should be called during
* the initial attach().
*/
static int
{
int status;
"");
/* Initialize PCI config registers */
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
/* Initialize the OpenHCI Hardware */
&soft_state->ohci);
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
/* Initialize SW based CSR registers */
&soft_state->csr);
/* Initialize the Asynchronous Q's */
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
/* Initialize the Isochronous logic */
&soft_state->isoch);
/* Initialize any Vendor Specific Registers */
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
HCI1394_TNF_HAL_STACK, "");
return (DDI_SUCCESS);
}
/*
* hci1394_hardware_resume()
* Resume the adapter HW. This routine will be called during resume after
* a successful system suspend. All memory should be in the state it was
* before the suspend. All we have to do is re-setup the HW.
*/
static int
{
int status;
"");
/* re-enable global byte swap (if we using it) */
/* Re-init the OpenHCI HW */
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
/* re-setup our SW based CSR registers */
/* Re-setup the Async Q's */
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
/* Re-setup any Vendor Specific Registers */
if (status != DDI_SUCCESS) {
HCI1394_TNF_HAL_ERROR, "");
HCI1394_TNF_HAL_STACK, "");
return (DDI_FAILURE);
}
HCI1394_TNF_HAL_STACK, "");
return (DDI_SUCCESS);
}
/*
* hci1394_pci_init()
* Map in PCI config space and initialize PCI config space registers.
*/
static int
{
int status;
#ifndef _LITTLE_ENDIAN
#endif
/* Setup PCI configuration space */
&soft_state->pci_config);
if (status != DDI_SUCCESS) {
"");
"");
return (DDI_FAILURE);
}
#ifdef _LITTLE_ENDIAN
/* Start of little endian specific code */
/* End of little endian specific code */
#else
/* Start of big endian specific code */
/* If PCI_Global_Swap bit is not set, try to set it */
/* Lets see if the global byte swap feature is supported */
if ((global_swap & OHCI_PCI_GLOBAL_SWAP) == 0) {
}
/* If PCI_Global_Swap bit is not set, it is unsupported */
if ((global_swap & OHCI_PCI_GLOBAL_SWAP) == 0) {
HCI1394_TNF_HAL_INFO, "global swap not present");
/*
* global byte swap is supported. This should be the case
* for almost all of the adapters.
*/
} else {
HCI1394_TNF_HAL_INFO, "global swap present");
}
/* End of big endian specific code */
#endif
/* read in vendor Information */
return (DDI_SUCCESS);
}
/*
* hci1394_pci_resume()
* Re-Initialize PCI config space registers during a resume.
*/
/* ARGSUSED */
static void
{
#ifndef _LITTLE_ENDIAN
#endif
#ifdef _LITTLE_ENDIAN
/* Start of little endian specific code */
/* nothing to do here yet. Maybe later?? */
/* End of little endian specific code */
#else
/* Start of big endian specific code */
/* If PCI_Global_Swap bit is not set, try to set it */
/* Try and set GlobalByteSwap */
if ((global_swap & OHCI_PCI_GLOBAL_SWAP) == 0) {
}
/* End of big endian specific code */
#endif
}
/*
* hci1394_resmap_get()
* Look for adapter property "reserved-addresses". This property is used to
* reserve 1394 address space so that it will not randomly be given to a
* target driver during a 1394 address space alloc. Some protocols hard
* code addresses which make us do this. The target driver must specifically
* ask for these addresses. This routine should be called before the
* call to h1394_attach().
*/
static int
{
int resv_num;
int status;
int reslen;
int rescnt;
int mapcnt;
/*
* See if the "reserved-addresses" property is defined. The format
* should be:
*
* reserved-addresses= 0x0000ffff,0xf0000B00,0x200,
* 0x0000ffff,0xf0000D00,0x200,
* 0x0000ffff,0xf0000234,0x4;
* You can have multiple reserved addresses. Each reserved address
* takes up 3 integers.
* MSWofAddr,LSWofAddr,ByteCount
*/
if (status != DDI_PROP_SUCCESS) {
/* the property is not defined, 0 reserved addresses */
HCI1394_TNF_HAL_STACK, "");
return (DDI_SUCCESS);
/*
* the property is defined but the correct number of integers
* is not present.
*/
resv_num = 0;
" Property ignored", ddi_node_name(
} else {
/* the property is defined. Alloc space to copy data into */
KM_SLEEP);
/* read in the address, length, and set the type to reserved */
rescnt = 0;
mapcnt = 0;
rescnt++;
rescnt++;
rescnt++;
mapcnt++;
}
}
/*
* copy the number of reserved address ranges and a pointer to the map
* into halinfo so we can tell the services layer about them in
* h1394_attach()
*/
return (DDI_SUCCESS);
}
/*
* hci1394_resmap_free()
* Free up the space alloced in hci1394_resmap_get(). This routine should
* be called after h1394_attach(). The HAL does not need this information
* and the services layer only uses it for a calculation during attach and
* should not refer to the pointer after it returns from h1394_attach().
*/
static void
{
/*
* if we have one or more reserved map entries, free up the space that
* was allocated to store them
*/
(sizeof (h1394_addr_map_t) *
}
}
/*
* hci1394_statebit_set()
* Set bit "statebit" in "state"
*/
static void
{
}
/*
* hci1394_statebit_tst()
* Return status of bit "statebit". Is it set or not?
*/
static boolean_t
{
int status;
if (bitset == 0) {
} else {
}
return (status);
}
/*
* hci1394_cleanup()
* Cleanup after a failed attach
*/
static void
{
int status;
/* Don't allow the HW to generate any more interrupts */
/* don't accept anymore commands from services layer */
/* Reset the chip */
/* Flush out async DMA Q's (cancels pendingQ timeouts too) */
}
}
}
}
}
}
}
}
}