03831d35f7499c87d51205817c93e9a8d42c4baestevel * CDDL HEADER START
03831d35f7499c87d51205817c93e9a8d42c4baestevel * The contents of this file are subject to the terms of the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Common Development and Distribution License (the "License").
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * You may not use this file except in compliance with the License.
03831d35f7499c87d51205817c93e9a8d42c4baestevel * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
03831d35f7499c87d51205817c93e9a8d42c4baestevel * See the License for the specific language governing permissions
03831d35f7499c87d51205817c93e9a8d42c4baestevel * and limitations under the License.
03831d35f7499c87d51205817c93e9a8d42c4baestevel * When distributing Covered Code, include this CDDL HEADER in each
03831d35f7499c87d51205817c93e9a8d42c4baestevel * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
03831d35f7499c87d51205817c93e9a8d42c4baestevel * If applicable, add the following below this CDDL HEADER, with the
03831d35f7499c87d51205817c93e9a8d42c4baestevel * fields enclosed by brackets "[]" replaced with your own identifying
03831d35f7499c87d51205817c93e9a8d42c4baestevel * information: Portions Copyright [yyyy] [name of copyright owner]
03831d35f7499c87d51205817c93e9a8d42c4baestevel * CDDL HEADER END
e79c98e6c943cb3032f272714ff4ce6137d40394zk * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Use is subject to license terms.
03831d35f7499c87d51205817c93e9a8d42c4baestevel#pragma ident "%Z%%M% %I% %E% SMI"
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Return the operating frequency of a processor in Hertz. This function
03831d35f7499c87d51205817c93e9a8d42c4baestevel * requires as input a legal prom node pointer. If a NULL
03831d35f7499c87d51205817c93e9a8d42c4baestevel * is passed in or the clock-frequency property does not exist, the
03831d35f7499c87d51205817c93e9a8d42c4baestevel * function returns 0.
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* find the property */
03831d35f7499c87d51205817c93e9a8d42c4baestevel if ((prop = find_prop(pnode, "clock-frequency")) == NULL) {
03831d35f7499c87d51205817c93e9a8d42c4baestevel return (0);
03831d35f7499c87d51205817c93e9a8d42c4baestevel return (0);
03831d35f7499c87d51205817c93e9a8d42c4baestevel * returns the size of the given processors external cache in
03831d35f7499c87d51205817c93e9a8d42c4baestevel * bytes. If the properties required to determine this are not
03831d35f7499c87d51205817c93e9a8d42c4baestevel * present, then the function returns 0.
03831d35f7499c87d51205817c93e9a8d42c4baestevel int *cache_size_p; /* pointer to number of cache lines */
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* find the properties */
03831d35f7499c87d51205817c93e9a8d42c4baestevel if (cache_size_p = (int *)get_prop_val(find_prop(node,
e79c98e6c943cb3032f272714ff4ce6137d40394zk "ecache-size"))) {
03831d35f7499c87d51205817c93e9a8d42c4baestevel if (cache_size_p = (int *)get_prop_val(find_prop(node,
e79c98e6c943cb3032f272714ff4ce6137d40394zk "l3-cache-size"))) {
03831d35f7499c87d51205817c93e9a8d42c4baestevel if (cache_size_p = (int *)get_prop_val(find_prop(node,
e79c98e6c943cb3032f272714ff4ce6137d40394zk "l2-cache-size"))) {
03831d35f7499c87d51205817c93e9a8d42c4baestevel return (0);
03831d35f7499c87d51205817c93e9a8d42c4baestevel * This routine is the generic link into displaying CPU and memory info.
03831d35f7499c87d51205817c93e9a8d42c4baestevel * It displays the table header, then calls the CPU and memory display
03831d35f7499c87d51205817c93e9a8d42c4baestevel * routine for all boards.
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Display the table header for CPUs . Then display the CPU
03831d35f7499c87d51205817c93e9a8d42c4baestevel * frequency, cache size, and processor revision of all cpus.
e79c98e6c943cb3032f272714ff4ce6137d40394zk " CPU CPU\n", 0);
e79c98e6c943cb3032f272714ff4ce6137d40394zk "Impl. Mask\n", 0);
e79c98e6c943cb3032f272714ff4ce6137d40394zk "------ ----\n", 0);
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* Now display all of the cpus on each board */
03831d35f7499c87d51205817c93e9a8d42c4baestevel * Display the CPUs present on this board.
03831d35f7499c87d51205817c93e9a8d42c4baestevel * display the CPUs' operating frequency, cache size, impl. field
03831d35f7499c87d51205817c93e9a8d42c4baestevel * and mask revision.
03831d35f7499c87d51205817c93e9a8d42c4baestevel for (cpu = dev_find_type(board->nodes, "cpu"); cpu != NULL;
03831d35f7499c87d51205817c93e9a8d42c4baestevel mid = (int *)get_prop_val(find_prop(cpu, "upa-portid"));
03831d35f7499c87d51205817c93e9a8d42c4baestevel impl = (int *)get_prop_val(find_prop(cpu, "implementation#"));
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* Do not display a failed CPU node */
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* Board number */
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* CPU MID */
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* Module number */
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* Running frequency */
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* Ecache size */
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* Implementation */
03831d35f7499c87d51205817c93e9a8d42c4baestevel switch (*impl) {
03831d35f7499c87d51205817c93e9a8d42c4baestevel /* CPU Mask */