dt_cg.c revision 7c478bd95313f5f23a4c958a745db2134aa03244
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
#include <sys/sysmacros.h>
#include <sys/isa_defs.h>
#include <strings.h>
#include <stdlib.h>
#include <setjmp.h>
#include <assert.h>
#include <errno.h>
#include <dt_impl.h>
#include <dt_grammar.h>
#include <dt_parser.h>
#include <dt_provider.h>
static dt_irnode_t *
{
return (dip);
}
/*
* Code generator wrapper function for ctf_member_info. If we are given a
* reference to a forward declaration tag, search the entire type space for
* the actual definition and then call ctf_member_info on the result.
*/
static ctf_file_t *
{
char n[DT_TYPE_NAMELEN];
break; /* unable to improve our position */
}
return (NULL); /* ctf_errno is set for us */
return (fp);
}
static void
{
if (intoff == -1)
if (intoff > DIF_INTOFF_MAX)
}
static void
{
}
/*
* When loading bit-fields, we want to convert a byte count in the range
* 1-8 to the closest power of 2 (e.g. 3->4, 5->8, etc). The clp2() function
* is a clever implementation from "Hacker's Delight" by Henry Warren, Jr.
*/
static size_t
{
x--;
x |= (x >> 1);
x |= (x >> 2);
x |= (x >> 4);
x |= (x >> 8);
x |= (x >> 16);
return (x + 1);
}
/*
* Lookup the correct load opcode to use for the specified node and CTF type.
* We determine the size and convert it to a 3-bit index. Our lookup table
* is constructed to use a 5-bit index, consisting of the 3-bit size 0-7, a
* bit for the sign, and a bit for userland address. For example, a 4-byte
* signed load from userland would be at the following table index:
* user=1 sign=1 size=4 => binary index 11011 = decimal index 27
*/
static uint_t
{
0, 0, 0, DIF_OP_LDX,
0, 0, 0, DIF_OP_LDX,
0, 0, 0, DIF_OP_ULDX,
0, 0, 0, DIF_OP_ULDX,
};
/*
* If we're loading a bit-field, the size of our load is found by
* rounding cte_bits up to a byte boundary and then finding the
* nearest power of two to this value (see clp2(), above).
*/
else
"size %ld when passed by value\n", (long)size);
}
size--; /* convert size to 3-bit index */
size |= 0x08;
size |= 0x10;
}
static void
{
ctf_arinfo_t r;
int sreg;
if (kind == CTF_K_ARRAY) {
}
type = r.ctr_contents;
} else
return; /* multiply or divide by one can be omitted */
}
/*
* If the result of a "." or "->" operation is a bit-field, we use this routine
* to generate an epilogue to the load instruction that extracts the value. In
* the diagrams below the "ld??" is the load instruction that is generated to
* load the containing word that is generating prior to calling this function.
*
* Epilogue for unsigned fields: Epilogue for signed fields:
*
* ldu? [r1], r1 lds? [r1], r1
* setx USHIFT, r2 setx 64 - SSHIFT, r2
* srl r1, r2, r1 sll r1, r2, r1
* setx (1 << bits) - 1, r2 setx 64 - bits, r2
* and r1, r2, r1 sra r1, r2, r1
*
* The *SHIFT constants above changes value depending on the endian-ness of our
* target architecture. Refer to the comments below for more details.
*/
static void
{
}
/*
* On little-endian architectures, ctm_offset counts from the right so
* ctm_offset % NBBY itself is the amount we want to shift right to
* move the value bits to the little end of the register to mask them.
* On big-endian architectures, ctm_offset counts from the left so we
* must subtract (ctm_offset % NBBY + cte_bits) from the size in bits
* we used for the load. The size of our load in turn is found by
* rounding cte_bits up to a byte boundary and then finding the
* nearest power of two to this value (see clp2(), above). These
* properties are used to compute shift as USHIFT or SSHIFT, below.
*/
#ifdef _BIG_ENDIAN
#else
#endif
} else {
#ifdef _BIG_ENDIAN
#else
#endif
}
}
/*
* If the destination of a store operation is a bit-field, we use this routine
* to generate a prologue to the store instruction that loads the surrounding
* bits, clears the destination field, and ORs in the new value of the field.
* In the diagram below the "st?" is the store instruction that is generated to
* store the containing word that is generating after calling this function.
*
* ld [dst->dn_reg], r1
* setx ~(((1 << cte_bits) - 1) << (ctm_offset % NBBY)), r2
* and r1, r2, r1
*
* setx (1 << cte_bits) - 1, r2
* and src->dn_reg, r2, r2
* setx ctm_offset % NBBY, r3
* sll r2, r3, r2
*
* or r1, r2, r1
* st? r1, [dst->dn_reg]
*
* This routine allocates a new register to hold the value to be stored and
* returns it. The caller is responsible for freeing this register later.
*/
static int
{
}
}
}
/*
* Compute shifts and masks. We need to compute "shift" as the amount
* we need to shift left to position our field in the containing word.
* Refer to the comments in dt_cg_field_get(), above, for more info.
* We then compute fmask as the mask that truncates the value in the
* input register to width cte_bits, and cmask as the mask used to
* pass through the containing bits and zero the field bits.
*/
#ifdef _BIG_ENDIAN
#else
#endif
return (r1);
}
static void
{
int reg;
/*
* If we're loading a bit-field, the size of our store is found by
* rounding dst's cte_bits up to a byte boundary and then finding the
* nearest power of two to this value (see clp2(), above).
*/
else
} else {
else
switch (size) {
case 1:
break;
case 2:
break;
case 4:
break;
case 8:
break;
default:
}
}
}
/*
* Generate code for a typecast or for argument promotion from the type of the
* actual to the type of the formal. We need to generate code for casts when
* a scalar type is being narrowed or changing signed-ness. We first shift the
* desired bits high (losing excess bits if narrowing) and then shift them down
* using logical shift (unsigned result) or arithmetic shift (signed result).
*/
static void
{
int reg, n;
else
}
}
/*
* Generate code to push the specified argument list on to the tuple stack.
* We use this routine for handling subroutine calls and associative arrays.
* We must first generate code for all subexpressions before loading the stack
* because any subexpression could itself require the use of the tuple stack.
* This holds a number of registers equal to the number of arguments, but this
* is not a huge problem because the number of arguments can't exceed the
* number of tuple register stack elements anyway. At most one extra register
* is required (either by dt_cg_typecast() or for dtdt_size, below). This
* implies that a DIF implementation should offer a number of general purpose
* registers at least one greater than the number of tuple registers.
*/
static void
{
int i = 0;
int reg;
dt_node_diftype(dnp, &t);
if (t.dtdt_flags & DIF_TF_BYREF)
op = DIF_OP_PUSHTR;
else
op = DIF_OP_PUSHTV;
if (t.dtdt_size != 0) {
} else
reg = DIF_REG_R0;
if (reg != DIF_REG_R0)
}
}
static void
{
is_ptr_op = 0;
}
}
static uint_t
{
}
static void
{
int reg;
if (dt_node_is_pointer(dnp)) {
}
/*
* If we are modifying a variable, generate an stv instruction from
* the variable specified by the identifier. If we are storing to a
* memory address, generate code again for the left-hand side using
* DT_NF_REF to get the address, and then generate a store to it.
* In both paths, we store the value in dnp->dn_reg (the new value).
*/
} else {
}
}
static void
{
int nreg;
if (dt_node_is_pointer(dnp)) {
}
/*
* If we are modifying a variable, generate an stv instruction from
* the variable specified by the identifier. If we are storing to a
* memory address, generate code again for the left-hand side using
* DT_NF_REF to get the address, and then generate a store to it.
* In both paths, we store the value from 'nreg' (the new value).
*/
} else {
}
}
/*
* Determine if we should perform signed or unsigned comparison for an OP2.
* If both operands are of arithmetic type, perform the usual arithmetic
* conversions to determine the common real type for comparison [ISOC 6.5.8.3].
*/
static int
{
return (1); /* strings always compare signed */
return (0); /* non-arithmetic types always compare unsigned */
}
static void
{
opc = DIF_OP_SCMP;
else
opc = DIF_OP_CMP;
}
/*
* Code generation for the ternary op requires some trickery with the assembler
* in order to conserve registers. We generate code for dn_expr and dn_left
* and free their registers so they do not have be consumed across codegen for
* dn_right. We insert a dummy MOV at the end of dn_left into the destination
* register, which is not yet known because we haven't done dn_right yet, and
* save the pointer to this instruction node. We then generate code for
* dn_right and use its register as our output. Finally, we reach back and
* patch the instruction for dn_left to move its output into this register.
*/
static void
{
/*
* Now that dn_reg is assigned, reach back and patch the correct MOV
* instruction into the tail of dn_left. We know dn_reg was unused
* at that point because otherwise dn_right couldn't have allocated it.
*/
}
static void
{
}
static void
{
}
static void
{
}
static void
{
}
static void
{
/*
* If we are performing a structure assignment of a translated type,
* we must instantiate all members and create a snapshot of the object
* in scratch space. We allocs a chunk of memory, generate code for
* each member, and then set dnp->dn_reg to the scratch object address.
*/
/*
* Create two fake dt_node_t's representing operator "." and a
* right-hand identifier child node. These will be repeatedly
* modified according to each instantiated member so that we
* can pass them to dt_cg_store() and effect a member store.
*/
/*
* Allocate a register for our scratch data pointer. First we
* set it to the size of our data structure, and then replace
* it with the result of an allocs of the specified size.
*/
/*
* When dt_cg_asgn_op() is called, we have already generated
* code for dnp->dn_right, which is the translator input. We
* now associate this register with the translator's input
* identifier so it can be referenced during our member loop.
*/
/*
* Generate code for the translator member expression,
* and then cast the result to the member type.
*/
/*
* Ask CTF for the offset of the member so we can store
* to the appropriate offset. This call has already
* been done once by the parser, so it should succeed.
*/
}
/*
* If the destination member is at offset 0, store the
* result directly to r1 (the scratch buffer address).
* Otherwise allocate another temporary for the offset
* and add r1 to it before storing the result.
*/
if (ctm.ctm_offset != 0) {
/*
* Add the member offset rounded down to the
* nearest byte. If the offset was not aligned
* on a byte boundary, this member is a bit-
* field and dt_cg_store() will handle masking.
*/
} else {
}
}
}
/*
* If we are storing to a variable, generate an stv instruction from
* the variable specified by the identifier. If we are storing to a
* memory address, generate code again for the left-hand side using
* DT_NF_REF to get the address, and then generate a store to it.
* In both paths, we assume dnp->dn_reg already has the new value.
*/
} else {
}
}
static void
{
op = DIF_OP_LDTAA;
else
op = DIF_OP_LDGAA;
/*
* If the associative array is a pass-by-reference type, then we are
* loading its value as a pointer to either load or store through it.
* The array element in question may not have been faulted in yet, in
* which case DIF_OP_LD*AA will return zero. We append an epilogue
* of instructions similar to the following:
*
* ld?aa id, %r1 ! base ld?aa instruction above
* tst %r1 ! start of epilogue
* +--- bne label
* | setx size, %r1
* | allocs %r1, %r1
* | st?aa id, %r1
* | ld?aa id, %r1
* v
* label: < rest of code >
*
* The idea is that we allocs a zero-filled chunk of scratch space and
* do a DIF_OP_ST*AA to fault in and initialize the array element, and
* then reload it to get the faulted-in address of the new variable
* storage. This isn't cheap, but pass-by-ref associative array values
* are (thus far) uncommon and the allocs cost only occurs once. If
* this path becomes important to DTrace users, we can improve things
* by adding a new DIF opcode to fault in associative array elements.
*/
}
}
static void
{
int reg, n;
/*
* If this is a reference in the args[] array, temporarily modify the
* array index according to the static argument mapping (if any).
*/
op = DIF_OP_LDTA;
else
op = DIF_OP_LDGA;
/*
* If this is a reference to the args[] array, we need to take the
* additional step of explicitly eliminating any bits larger than the
* type size: the DIF interpreter in the kernel will always give us
* the raw (64-bit) argument value, and any bits larger than the type
* size may be junk. As a practical matter, this arises only on 64-bit
* architectures and only when the argument index is larger than the
* number of arguments passed directly to DTrace: if a 8-, 16- or
* 32-bit argument must be retrieved from the stack, it is possible
* (and it some cases, likely) that the upper bits will be garbage.
*/
return;
return;
}
/*
* Generate code for an inlined variable reference. Inlines can be used to
* define either scalar or associative array substitutions. For scalars, we
* simply generate code for the parse tree saved in the identifier's din_root,
* and then cast the resulting expression to the inline's declaration type.
* For arrays, we take the input parameter subtrees from dnp->dn_args and
* temporarily store them in the din_root of each din_argv[i] identifier,
* which are themselves inlines and were set up for us by the parser. The
* result is that any reference to the inlined parameter inside the top-level
* din_root will turn into a recursive call to dt_cg_inline() for a scalar
* inline whose din_root will refer to the subtree pointed to by the argument.
*/
static void
{
int i;
}
}
}
}
}
}
static void
{
int reg;
case DT_TOK_COMMA:
break;
case DT_TOK_ASGN:
break;
case DT_TOK_ADD_EQ:
break;
case DT_TOK_SUB_EQ:
break;
case DT_TOK_MUL_EQ:
break;
case DT_TOK_DIV_EQ:
break;
case DT_TOK_MOD_EQ:
break;
case DT_TOK_AND_EQ:
break;
case DT_TOK_XOR_EQ:
break;
case DT_TOK_OR_EQ:
break;
case DT_TOK_LSH_EQ:
break;
case DT_TOK_RSH_EQ:
break;
case DT_TOK_QUESTION:
break;
case DT_TOK_LOR:
break;
case DT_TOK_LXOR:
break;
case DT_TOK_LAND:
break;
case DT_TOK_BOR:
break;
case DT_TOK_XOR:
break;
case DT_TOK_BAND:
break;
case DT_TOK_EQU:
break;
case DT_TOK_NEQ:
break;
case DT_TOK_LT:
break;
case DT_TOK_LE:
break;
case DT_TOK_GT:
break;
case DT_TOK_GE:
break;
case DT_TOK_LSH:
break;
case DT_TOK_RSH:
break;
case DT_TOK_ADD:
break;
case DT_TOK_SUB:
break;
case DT_TOK_MUL:
break;
case DT_TOK_DIV:
break;
case DT_TOK_MOD:
break;
case DT_TOK_LNEG:
break;
case DT_TOK_BNEG:
break;
case DT_TOK_PREINC:
break;
case DT_TOK_POSTINC:
break;
case DT_TOK_PREDEC:
break;
case DT_TOK_POSTDEC:
break;
case DT_TOK_IPOS:
break;
case DT_TOK_INEG:
break;
case DT_TOK_DEREF:
/*
* Save and restore DT_NF_USERLAND across dt_cg_load():
* we need the sign bit from dnp and the user bit from
* dnp->dn_child in order to get the proper opcode.
*/
}
break;
case DT_TOK_ADDROF: {
break;
}
case DT_TOK_SIZEOF: {
break;
}
case DT_TOK_STRINGOF:
break;
case DT_TOK_XLATE:
break;
case DT_TOK_LPAR:
break;
case DT_TOK_PTR:
case DT_TOK_DOT:
/*
* If the left-hand side of PTR or DOT is a dynamic variable,
* we expect it to be the output of a D translator. In this
* case, we look up the parse tree corresponding to the member
* that is being accessed and run the code generator over it.
* We then cast the result as if by the assignment operator.
*/
if ((idp = dt_node_resolve(
(idp = dt_node_resolve(
break;
}
}
}
if (m.ctm_offset != 0) {
/*
* If the offset is not aligned on a byte boundary, it
* is a bit-field member and we will extract the value
* bits below after we generate the appropriate load.
*/
}
/*
* Save and restore DT_NF_USERLAND across dt_cg_load():
* we need the sign bit from dnp and the user bit from
* dnp->dn_left in order to get the proper opcode.
*/
}
break;
case DT_TOK_STRING:
if (stroff == -1L)
if (stroff > DIF_STROFF_MAX)
break;
case DT_TOK_IDENT:
/*
* If the specified identifier is a variable on which we have
* set the code generator register flag, then this variable
* has already had code generated for it and saved in di_id.
* Allocate a new register and copy the existing value to it.
*/
break;
}
/*
* Identifiers can represent function calls, variable refs, or
* symbols. First we check for inlined variables, and handle
* them by generating code for the inline parse tree.
*/
break;
}
case DT_NODE_FUNC:
"called from a D expression (D program "
"context required)\n",
}
break;
case DT_NODE_VAR:
/*
* This can only happen if we have translated
* args[]. See dt_idcook_args() for details.
*/
break;
}
else
break;
}
op = DIF_OP_LDLS;
op = DIF_OP_LDTS;
else
op = DIF_OP_LDGS;
break;
case DT_NODE_SYM: {
if (dtrace_lookup_by_name(dtp,
}
}
break;
}
default:
}
break;
case DT_TOK_INT:
break;
default:
}
}
void
{
if (dt_node_is_dynamic(dnp)) {
"of dynamic type\n");
}
}