chip_sun4v.c revision 13faa91230bde46da937bf33010b9accc5bdeb59
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
#include <stdio.h>
#include <stdlib.h>
#include <strings.h>
#include <fm/topo_mod.h>
#include <unistd.h>
#include <fcntl.h>
#include <umem.h>
#include <cpu_mdesc.h>
/*
* Enumerates the processing chips, or sockets, (as distinct from cores) in a
* system. For each chip found, the necessary nodes (one or more cores, and
* possibly a memory controller) are constructed underneath.
*/
#define CHIP_VERSION TOPO_VERSION
#define CPU_NODE_NAME "cpu"
#define CHIP_NODE_NAME "chip"
/* Forward declaration */
topo_instance_t, void *, void *);
static const topo_modops_t chip_ops =
{ chip_enum, chip_release };
static const topo_modinfo_t chip_info =
static const topo_pgroup_info_t chip_auth_pgroup = {
1
};
int
{
if (getenv("TOPOCHIPDBG"))
return (-1);
return (-1);
}
return (-1);
}
return (0);
}
void
{
}
static tnode_t *
{
int err;
prod);
}
server);
}
csn);
}
}
"Unable to make nvlist for %s bind: %s.\n",
return (NULL);
}
"topo_node_bind (%s%d/%s%d) failed: %s\n",
name, i,
return (NULL);
}
}
/* Inherit the Label FRU fields from the parent */
return (ntn);
}
static nvlist_t *
{
int err;
return (NULL);
if (err != 0) {
return (NULL);
}
return (fmri);
}
/*ARGSUSED*/
static int
{
int i;
int min = -1;
int max = -1;
int err;
int nerr = 0;
int pid;
char sbuf[32];
/*
*/
continue;
}
return (-1);
}
return (-1);
}
/*
* Create the cpu[i] nodes of a given cmp i
*/
if (mcmp->cpumap_serialno == 0 ||
continue;
}
/* physical cpuid */
"failed to create a cpu=%d node: %s\n",
nerr++;
continue;
}
} else {
nerr++;
}
}
if (nerr != 0)
return (0);
}
/*ARGSUSED*/
static int
{
int nerr = 0;
int err;
int i;
char sbuf[32];
return (-1);
}
/*
* Create the chip[i] nodes, one for each CMP chip uniquely identified
* by the serial number.
*/
/* Skip the processors with no serial number */
continue;
}
continue;
}
nerr++;
continue;
}
/* Enumerate all cpu strands of this CMP chip */
if (err != 0) {
nerr++;
}
}
if (nerr != 0)
return (0);
}
/*ARGSUSED*/
static int
{
return (0);
}
/*ARGSUSED*/
static void
{
}