x86pi_hostbridge.c revision 03f9f63d24f0494b7d47b927090ad9045e396402
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2010 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* i86pc Generic hostbridge/pciex/pci enumerator
*
* hostbridge/pciexrc/pcibus topo nodes are created per SMBIOS type 138
* (SUN_OEM_PCIEXRC) records. Each type 138 record can either represent
* a baseboard record or another type 138 record.
*
* x86pi_gen_hbr() is called when a new hostbridge node needs to be created..
* It then searches all the type 138 records that connected to it. For each
* of the records, bdf is compared to find a matching di_node. If the
* di_node is a pciex root port, a pciexrc (bad name!) node will be created.
* When pciexrc creation is done, or the di_node is a pcibus, in either
*
* The enumeration uses did routines heavily, which requires a did hash
* pointer stored in x86pi's module-specific area.
*/
#include <strings.h>
#include <fm/topo_mod.h>
#include <sys/systeminfo.h>
#include <sys/smbios_impl.h>
#include <x86pi_impl.h>
#include <did.h>
#include <did_impl.h>
#include <did_props.h>
#include <hostbridge.h>
#define PCI_ENUM "pcibus"
#define PCI_ENUMR_VERS 1
#define MAX_HB_BUSES 255
int
{
const char *f = "x86pi_hbr_enum_init";
return (-1);
}
== NULL) {
"%s: %s enumerator could not load %s.\n",
f, HOSTBRIDGE, PCI_ENUM);
return (-1);
}
return (0);
}
void
{
}
}
static int
{
int rv;
x86pi_hcfmri_t hcfmri = {0};
const char *f = "pciexrc_process";
return (NULL);
/*
* Let did set the hostbridge properties excluding FRU and label.
*/
"%s: create child range for %s failed: %s\n",
return (-1);
}
if (rv != 0) {
f, PCIEX_ROOT, rci);
return (-1);
}
/*
* pcibus enumerator requires di_node_t be set in node specific
*/
/*
* Let did set the RC properties excluding FRU, and label.
*/
f, PCIEX_ROOT, rci);
return (-1);
}
"%s: create child range for %s failed: %s\n",
return (-1);
}
0, MAX_HB_BUSES, did));
}
static int
{
return (-1);
/*
* Let did set the hostbridge properties excluding FRU and label.
*/
return (-1);
}
0, MAX_HB_BUSES, did));
}
static int
{
(int)bdf);
if (devtree == DI_NODE_NIL) {
return (-1);
}
while (pnode != DI_NODE_NIL) {
continue;
"bdf = %#x\n", (int)bdf);
}
}
return (0);
}
int
{
x86pi_hcfmri_t hcfmri = {0};
const char *f = "x86pi_gen_hbr";
/* create and bind the "hostbridge" node */
if (rv != 0) {
f, HOSTBRIDGE, hbri);
}
/*
*/
rcip) != 0)
err++;
}
}