cpu.h revision 1b8adde7ba7d5e04395c141c5400dc2cffd7d809
#ifndef I386_BITS_CPU_H
#define I386_BITS_CPU_H
/* Sample usage: CPU_FEATURE_P(cpu.x86_capability, FPU) */
/* Intel-defined CPU features, CPUID level 0x00000001, word 0 */
/* of FPU context), and CR4.OSFXSR available */
/* AMD-defined CPU features, CPUID level 0x80000001, word 1 */
/* Don't duplicate feature flags which are redundant with Intel! */
/* Transmeta-defined CPU features, CPUID level 0x80860001, word 2 */
/* Other features, Linux-defined mapping, word 3 */
/* This range is used for feature bits which conflict or are synthesized */
#define MAX_X86_VENDOR_ID 16
struct cpuinfo_x86 {
int cpuid_level; /* Maximum supported CPUID level, -1=no CPUID */
unsigned x86_capability[NCAPINTS];
char x86_vendor_id[MAX_X86_VENDOR_ID];
};
#define X86_VENDOR_INTEL 0
#define X86_VENDOR_CYRIX 1
#define X86_VENDOR_AMD 2
#define X86_VENDOR_UMC 3
#define X86_VENDOR_NEXGEN 4
#define X86_VENDOR_CENTAUR 5
#define X86_VENDOR_RISE 6
#define X86_VENDOR_TRANSMETA 7
#define X86_VENDOR_NSC 8
#define X86_VENDOR_UNKNOWN 0xff
/*
* EFLAGS bits
*/
/*
* Generic CPUID function
*/
{
__asm__("cpuid"
: "=a" (*eax),
"=b" (*ebx),
"=c" (*ecx),
"=d" (*edx)
: "0" (op));
}
/*
* CPUID functions returning a single datum
*/
{
unsigned int eax;
__asm__("cpuid"
: "=a" (eax)
: "0" (op)
: "bx", "cx", "dx");
return eax;
}
{
__asm__("cpuid"
: "0" (op)
: "cx", "dx" );
return ebx;
}
{
__asm__("cpuid"
: "0" (op)
: "bx", "dx" );
return ecx;
}
{
__asm__("cpuid"
: "0" (op)
: "bx", "cx");
return edx;
}
/*
* Intel CPU features in CR4
*/
#define MSR_K6_EFER 0xC0000080
/* EFER bits: */
: "c" (msr))
: /* no outputs */ \
#define read_cr0() ({ \
unsigned int __dummy; \
__asm__( \
"movl %%cr0, %0\n\t" \
:"=r" (__dummy)); \
__dummy; \
})
#define write_cr0(x) \
#define read_cr3() ({ \
unsigned int __dummy; \
__asm__( \
"movl %%cr3, %0\n\t" \
:"=r" (__dummy)); \
__dummy; \
})
#define write_cr3x(x) \
#define read_cr4() ({ \
unsigned int __dummy; \
__asm__( \
"movl %%cr4, %0\n\t" \
:"=r" (__dummy)); \
__dummy; \
})
#define write_cr4x(x) \
extern struct cpuinfo_x86 cpu_info;
#ifdef CONFIG_X86_64
extern void cpu_setup(void);
#else
#define cpu_setup() do {} while(0)
#endif
#endif /* I386_BITS_CPU_H */