io.h revision 7c478bd95313f5f23a4c958a745db2134aa03244
#ifndef IO_H
#define IO_H
/* Amount of relocation etherboot is experiencing */
extern unsigned long virt_offset;
/* Don't require identity mapped physical memory,
* osloader.c is the only valid user at the moment.
*/
unsigned long virt_to_phys(volatile const void *virt_addr);
void *phys_to_virt(unsigned long phys_addr);
/* virt_to_bus converts an addresss inside of etherboot [_start, _end]
* into a memory access cards can use.
*/
#define virt_to_bus virt_to_phys
/* bus_to_virt reverses virt_to_bus, the address must be output
* from virt_to_bus to be valid. This function does not work on
* all bus addresses.
*/
#define bus_to_virt phys_to_virt
/* ioremap converts a random 32bit bus address into something
* etherboot can access.
*/
{
return bus_to_virt(bus_addr);
}
/* iounmap cleans up anything ioremap had to setup */
{
return;
}
/*
* This file contains the definitions for the x86 IO instructions
*
* This file is not meant to be obfuscating: it's just complicated
* to (a) handle it all in a way that makes gcc able to optimize it
* as well as possible and (b) trying to avoid writing the same thing
* over and over again with slight variations and possibly making a
* mistake somewhere.
*/
/*
* Thanks to James van Artsdalen for a better timing-fix than
* the two short jumps: using outb's to a nonexistent port seems
* to guarantee better timings even on fast machines.
*
* On the other hand, I'd like to be sure of a non-existent port:
* I feel a bit unsafe about using 0x80 (should be safe, though)
*
* Linus
*/
#ifdef SLOW_IO_BY_JUMPING
#else
#endif
#ifdef REALLY_SLOW_IO
#else
#define SLOW_DOWN_IO __SLOW_DOWN_IO
#endif
/*
* architectures the memory mapped IO stuff needs to be accessed
* memory location directly.
*/
#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
/*
* Force strict CPU ordering.
* And yes, this is required on UP too when we're talking
* to devices.
*
* For now, "wmb()" doesn't actually do anything, as all
* Intel CPU's follow what Intel calls a *Processor Order*,
* in which all writes are seen in the program order even
* outside the CPU.
*
* I expect future Intel CPU's to have a weaker ordering,
* but I'd also expect them to finally get their act together
* and add some real memory barriers if so.
*
* Some non intel clones support out of order store. wmb() ceases to be a
* nop for these.
*/
/*
* Talk about misusing macros..
*/
#define __OUT1(s,x) \
#define __IN1(s,x) \
#define __INS(s) \
#define __OUTS(s) \
__IN(b,"", char)
__IN(w,"",short)
__IN(l,"", long)
__OUT(b,"b",char)
__OUT(w,"w",short)
__OUT(l,,int)
__INS(b)
__INS(w)
__INS(l)
__OUTS(b)
__OUTS(w)
__OUTS(l)
/*
* Note that due to the way __builtin_constant_p() works, you
* - can't use it inside a inline function (it will never be true)
* - you don't have to worry about side effects within the __builtin..
*/
#endif /* ETHERBOOT_IO_H */