afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows/*
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * CDDL HEADER START
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows *
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * The contents of this file are subject to the terms of the
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * Common Development and Distribution License (the "License").
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * You may not use this file except in compliance with the License.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows *
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * or http://www.opensolaris.org/os/licensing.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * See the License for the specific language governing permissions
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * and limitations under the License.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows *
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * When distributing Covered Code, include this CDDL HEADER in each
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * If applicable, add the following below this CDDL HEADER, with the
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * fields enclosed by brackets "[]" replaced with your own identifying
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * information: Portions Copyright [yyyy] [name of copyright owner]
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows *
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * CDDL HEADER END
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows/*
8de5c4f463386063e184a851437d58080c6c626cDan OpenSolaris Anderson * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * Use is subject to license terms.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#ifndef _MD5_BYTESWAP_H
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define _MD5_BYTESWAP_H
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows/*
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * definitions for inline functions for little-endian loads.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows *
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * This file has special definitions for UltraSPARC architectures,
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * which have a special address space identifier for loading 32 and 16 bit
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * integers in little-endian byte order.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows *
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * This file and common/crypto/md5/sparc/sun4[uv]/byteswap.il implement the
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * same thing and must be changed together.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson#include <sys/types.h>
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#if defined(__sparc)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#include <v9/sys/asi.h>
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson#elif defined(_LITTLE_ENDIAN)
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson#include <sys/byteorder.h>
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#endif
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#ifdef __cplusplus
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern "C" {
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#endif
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#if defined(_LITTLE_ENDIAN)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows/*
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * Little-endian optimization: I don't need to do any weirdness. On
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * some little-endian boxen, I'll have to do alignment checks, but I can do
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * that below.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#if !defined(__i386) && !defined(__amd64)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows/*
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * i386 and amd64 don't require aligned 4-byte loads. The symbol
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * _MD5_CHECK_ALIGNMENT indicates below whether the MD5Transform function
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * requires alignment checking.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define _MD5_CHECK_ALIGNMENT
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#endif /* !__i386 && !__amd64 */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
8de5c4f463386063e184a851437d58080c6c626cDan OpenSolaris Anderson#define LOAD_LITTLE_32(addr) (*(uint32_t *)(void *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#else /* !_LITTLE_ENDIAN */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows/*
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * sparc v9/v8plus optimization:
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows *
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * on the sparc v9/v8plus, we can load data little endian. however, since
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * the compiler doesn't have direct support for little endian, we
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * link to an assembly-language routine `load_little_32' to do
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * the magic. note that special care must be taken to ensure the
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * address is 32-bit aligned -- in the interest of speed, we don't
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * check to make sure, since careful programming can guarantee this
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * for us.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#if defined(sun4u)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows/* Define alignment check because we can 4-byte load as little endian. */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define _MD5_CHECK_ALIGNMENT
8de5c4f463386063e184a851437d58080c6c626cDan OpenSolaris Anderson#define LOAD_LITTLE_32(addr) load_little_32((uint32_t *)(void *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#if !defined(__lint) && defined(__GNUC__)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsstatic __inline__ uint32_t
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsload_little_32(uint32_t *addr)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows{
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows uint32_t value;
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows __asm__(
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows "lduwa [%1] %2, %0\n\t"
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson : "=r" (value)
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson : "r" (addr), "i" (ASI_PL));
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows return (value);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows}
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#endif /* !__lint && __GNUC__ */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#if !defined(__GNUC__)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#endif /* !__GNUC__ */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
734b6a94890be549309b21156f8ed6d4561cac51darrenm/* Placate lint */
734b6a94890be549309b21156f8ed6d4561cac51darrenm#if defined(__lint)
734b6a94890be549309b21156f8ed6d4561cac51darrenmuint32_t
734b6a94890be549309b21156f8ed6d4561cac51darrenmload_little_32(uint32_t *addr)
734b6a94890be549309b21156f8ed6d4561cac51darrenm{
734b6a94890be549309b21156f8ed6d4561cac51darrenm return (*addr);
734b6a94890be549309b21156f8ed6d4561cac51darrenm}
734b6a94890be549309b21156f8ed6d4561cac51darrenm#endif /* __lint */
734b6a94890be549309b21156f8ed6d4561cac51darrenm
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson#elif defined(_LITTLE_ENDIAN)
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson#define LOAD_LITTLE_32(addr) htonl(addr)
734b6a94890be549309b21156f8ed6d4561cac51darrenm
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson#else
734b6a94890be549309b21156f8ed6d4561cac51darrenm/* big endian -- will work on little endian, but slowly */
734b6a94890be549309b21156f8ed6d4561cac51darrenm/* Since we do byte operations, we don't have to check for alignment. */
734b6a94890be549309b21156f8ed6d4561cac51darrenm#define LOAD_LITTLE_32(addr) \
734b6a94890be549309b21156f8ed6d4561cac51darrenm ((addr)[0] | ((addr)[1] << 8) | ((addr)[2] << 16) | ((addr)[3] << 24))
734b6a94890be549309b21156f8ed6d4561cac51darrenm#endif /* sun4u */
734b6a94890be549309b21156f8ed6d4561cac51darrenm
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#if defined(sun4v)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows/*
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * For N1 want to minimize number of arithmetic operations. This is best
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * achieved by using the %asi register to specify ASI for the lduwa operations.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * Also, have a separate inline template for each word, so can utilize the
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * immediate offset in lduwa, without relying on the compiler to do the right
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * thing.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows *
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * Moving to 64-bit loads might also be beneficial.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_0(addr) load_little_32_0((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_1(addr) load_little_32_1((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_2(addr) load_little_32_2((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_3(addr) load_little_32_3((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_4(addr) load_little_32_4((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_5(addr) load_little_32_5((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_6(addr) load_little_32_6((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_7(addr) load_little_32_7((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_8(addr) load_little_32_8((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_9(addr) load_little_32_9((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_a(addr) load_little_32_a((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_b(addr) load_little_32_b((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_c(addr) load_little_32_c((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_d(addr) load_little_32_d((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_e(addr) load_little_32_e((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LOAD_LITTLE_32_f(addr) load_little_32_f((uint32_t *)(addr))
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#if !defined(__lint) && defined(__GNUC__)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows/*
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * This actually sets the ASI register, not necessarily to ASI_PL.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsstatic __inline__ void
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsset_little(uint8_t asi)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows{
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows __asm__ __volatile__(
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson "wr %%g0, %0, %%asi\n\t"
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson : /* Nothing */
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson : "r" (asi));
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows}
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsstatic __inline__ uint8_t
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsget_little(void)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows{
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows uint8_t asi;
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows __asm__ __volatile__(
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson "rd %%asi, %0\n\t"
4b56a00321e0ce508e55cc5e43e3ad7b00005a39Daniel Anderson : "=r" (asi));
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows return (asi);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows}
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows/*
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * We have 16 functions which differ only in the offset from which they
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * load. Use this preprocessor template to simplify maintenance. Its
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * argument is the offset in hex, without the 0x.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#define LL_TEMPLATE(__off) \
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsstatic __inline__ uint32_t \
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsload_little_32_##__off(uint32_t *addr) \
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows{ \
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows uint32_t value; \
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows __asm__( \
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows "lduwa [%1 + %2]%%asi, %0\n\t" \
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows : "=r" (value) \
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows : "r" (addr), "i" ((0x##__off) << 2)); \
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows return (value); \
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows}
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(0)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(1)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(2)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(3)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(4)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(5)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(6)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(7)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(8)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(9)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(a)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(b)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(c)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(d)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(e)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsLL_TEMPLATE(f)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#undef LL_TEMPLATE
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#endif /* !__lint && __GNUC__ */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#if !defined(__GNUC__)
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows/*
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * Using the %asi register to achieve little endian loads - register
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * is set using a inline template.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows *
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * Saves a few arithmetic ops as can now use an immediate offset with the
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows * lduwa instructions.
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern void set_little(uint32_t);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t get_little(void);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_0(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_1(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_2(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_3(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_4(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_5(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_6(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_7(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_8(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_9(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_a(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_b(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_c(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_d(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_e(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolowsextern uint32_t load_little_32_f(uint32_t *);
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#endif /* !__GNUC__ */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#endif /* sun4v */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#endif /* _LITTLE_ENDIAN */
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#ifdef __cplusplus
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows}
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#endif
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows
afd1ac7b1c9a8cdf273c865aa5e9a14620341443wesolows#endif /* !_MD5_BYTESWAP_H */