proc_amd64dep.c revision 21227944c2bcc086121a5428f3f9d2496ba646f5
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2004 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
* Copyright 2015 Joyent, Inc.
*/
/*
* User Process Target Intel 32-bit component
*
* This file provides the ISA-dependent portion of the user process target.
* For more details on the implementation refer to mdb_proc.c.
*/
#include <mdb/mdb_proc.h>
#include <mdb/mdb_kreg.h>
#include <mdb/mdb_amd64util.h>
#include <sys/ucontext.h>
#include <libproc.h>
#include <ieeefp.h>
#include <stddef.h>
const mdb_tgt_regdesc_t pt_regdesc[] = {
{ NULL, 0, 0 }
};
/*
* We cannot rely on pr_instr, because if we hit a breakpoint or the user has
* artifically modified memory, it will no longer be correct.
*/
static uint8_t
{
return (ret);
}
/*ARGSUSED*/
int
{
return (DCMD_USAGE);
}
if (from_ucontext) {
int off;
if (!(flags & DCMD_ADDRSPEC)) {
mdb_warn("-u requires a ucontext_t address\n");
return (DCMD_ERR);
}
} else {
}
return (DCMD_ERR);
}
goto print_regs;
}
mdb_warn("no process active\n");
return (DCMD_ERR);
}
mdb_warn("debugger has lost control of process\n");
return (DCMD_ERR);
}
if (flags & DCMD_ADDRSPEC)
else
mdb_warn("failed to get current register set");
return (DCMD_ERR);
}
mdb_printf("%%rax = 0x%0?p\t%%r8 = 0x%0?p\n",
mdb_printf("%%rbx = 0x%0?p\t%%r9 = 0x%0?p\n",
mdb_printf("%%rcx = 0x%0?p\t%%r10 = 0x%0?p\n",
mdb_printf("%%rdx = 0x%0?p\t%%r11 = 0x%0?p\n",
mdb_printf("%%rsi = 0x%0?p\t%%r12 = 0x%0?p\n",
mdb_printf("%%rdi = 0x%0?p\t%%r13 = 0x%0?p\n",
mdb_printf(" %?s\t%%r14 = 0x%0?p\n",
mdb_printf(" %?s\t%%r15 = 0x%0?p\n",
mdb_printf("\n");
mdb_printf("%%cs = 0x%04x\t%%fs = 0x%04x\t%%gs = 0x%04x\n",
mdb_printf("%%ds = 0x%04x\t%%es = 0x%04x\t%%ss = 0x%04x\n",
mdb_printf("\n");
mdb_printf("\n");
mdb_printf(" id=%u vip=%u vif=%u ac=%u vm=%u rf=%u nt=%u iopl=0x%x\n",
mdb_printf(" status=<%s,%s,%s,%s,%s,%s,%s,%s,%s>\n",
mdb_printf("\n");
}
static const char *
{
char *p = buf;
buf[0] = '\0';
/*
* Decode all masks in the 80387 control word.
*/
/*
* Decode precision, rounding, and infinity options in control word.
*/
else
else
if (buf[0] == '|')
return (buf + 1);
return ("0");
}
static const char *
{
char *p = buf;
buf[0] = '\0';
/*
* Decode all masks in the 80387 status word.
*/
if (buf[0] == '|')
return (buf + 1);
return ("0");
}
static const char *
{
char *p = buf;
buf[0] = '\0';
/*
* Decode the MXCSR word
*/
else
if (buf[0] == '|')
return (buf + 1);
return ("0");
}
/*ARGSUSED*/
int
{
struct _fpchip_state fps;
char buf[256];
int i;
/*
* Union for overlaying _fpreg structure on to quad-precision
* floating-point value (long double).
*/
union {
long double ld;
} fpru;
/*
* Array of strings corresponding to FPU tag word values (see
* section 7.3.6 of the Intel Programmer's Reference Manual).
*/
if (argc != 0)
return (DCMD_USAGE);
mdb_warn("no process active\n");
return (DCMD_ERR);
}
mdb_warn("debugger has lost control of process\n");
return (DCMD_ERR);
}
if (flags & DCMD_ADDRSPEC)
else
mdb_printf("AMD64 (80486 chip with SSE)\n");
mdb_warn("failed to get floating point registers");
return (DCMD_ERR);
}
for (i = 0; i < 8; i++) {
/*
* Recall that we need to use the current TOP-of-stack value to
* associate the _st[] index back to a physical register number,
* since tag word indices are physical register numbers. Then
* to get the tag value, we shift over two bits for each tag
* index, and then grab the bottom two bits.
*/
/*
* AMD64 stores the tag in a compressed form. It is
* necessary to extract the original 2-bit tag value.
* See AMD64 Architecture Programmer's Manual Volume 2:
* System Programming, Chapter 11.
*/
if (tag_fctw == 0) {
} else if (exp == 0) {
else
} else if (exp == 0x7fff) {
tag_value = 0; /* valid */
} else {
}
mdb_printf("%%st%d 0x%04x.%04x%04x%04x%04x = %lg %s\n",
}
for (i = 0; i < 8; i++)
mdb_printf("%%xmm%d 0x%08x%08x%08x%08x\n", i,
return (DCMD_OK);
}
/*ARGSUSED*/
int
{
}
/*ARGSUSED*/
int
{
}
/*ARGSUSED*/
void
{
/* not implemented */
}
/*ARGSUSED*/
int
{
}
/*ARGSUSED*/
const char *
{
return ("amd64");
}
/*
* Determine the return address for the current frame.
*/
int
{
return (set_errno(EMDB_TGTBUSY));
}
/*
* Return the address of the next instruction following a call, or return -1
* and set errno to EAGAIN if the target should just single-step.
*/
int
{
return (set_errno(EMDB_TGTBUSY));
}