kvm_cpu_amd.c revision ae115bc77f6fcde83175c75b4206dc2e50747966
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2007 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
/*
* Debugging functionality unique to 64-bit AMD processors.
*/
#include <kmdb/kvm_cpu_impl.h>
#include <kmdb/kmdb_dpi.h>
#include <kmdb/kmdb_kdi.h>
#include <sys/x86_archext.h>
typedef struct kmt_cpu_amd {
/*
* The debugctl value in this struct needs to outlive the destruction of the
* kmt_cpu_t. It needs to be around for the final exit from the debugger so
* we can do the final write of the debugctl MSR.
*/
static kmt_cpu_amd_t kmt_cpu_amd;
static void
{
}
/*
* MSRs for AMD processors with simple branch tracing facilities. We'll use
*/
static const kdi_msr_t kmt_amd_msrs[] = {
{ MSR_LBR_TO, KDI_MSR_READ },
{ MSR_LBR_FROM, KDI_MSR_READ },
{ MSR_LEX_TO, KDI_MSR_READ },
{ MSR_LEX_FROM, KDI_MSR_READ },
{ NULL }
};
/*
*/
static const kdi_msr_t kmt_amdunk_msrs[] = {
{ NULL }
};
/*ARGSUSED*/
static void
{
/* Leave LBR on */
}
/*ARGSUSED*/
static const char *
{
return ("AMD");
}
/*ARGSUSED*/
static void
{
}
/* Enable branch stepping, to be disabled on the next debugger entry */
static int
{
(void) kmdb_dpi_set_register("rflags",
return (mdb_tgt_add_fault(t, KMT_TRAP_ALL,
kmt_amd_btf_clear, amd));
}
static kmt_cpu_ops_t kmt_amd_ops = {
};
/*ARGSUSED*/
static int
{
warn("branch tracing unavailable on unknown AMD CPU "
return (DCMD_ERR);
}
return (DCMD_USAGE);
return (0);
}
static const mdb_dcmd_t kmt_amd_dcmds[] = {
{ NULL }
};
{
return (NULL); /* errno is set for us */
if (vendor != X86_VENDOR_AMD) {
return (NULL);
}
/*
*/
if (kmt_msr_validate(kmt_amd_msrs))
return (cpu);
}