kaif_asmutil.h revision 7c478bd95313f5f23a4c958a745db2134aa03244
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#ifndef _KAIF_ASMUTIL_H
#define _KAIF_ASMUTIL_H
#pragma ident "%Z%%M% %I% %E% SMI"
#include <sys/segments.h>
#include <kmdb/kaif_regs.h>
#ifdef __cplusplus
extern "C" {
#endif
#ifdef _ASM
/*
* Multiple CPUs won't be present until cross-call initialization has
* completed. Until that time, we just assume we're CPU zero.
*
* This macro returns the CPUID in %rax, and doesn't clobber any other
* registers.
*/
#define GET_CPUID \
je 1f; \
jmp 2f; \
1: \
2:
/* clobbers %rdx, %rcx, returns addr in %rax, CPU ID in %rbx */
#define GET_CPUSAVE_ADDR \
GET_CPUID; \
/*CSTYLED*/ \
/*
* Save copies of the IDT and GDT descriptors. Note that we only save the IDT
* and GDT if the IDT isn't ours, as we may be legitimately re-entering the
* debugger through the trap handler. We don't want to clobber the saved IDT
* in the process, as we'd end up resuming the world on our IDT.
*
* assumes cpusave in %rax, clobbers %rcx
*/
#define SAVE_IDTGDT \
je 1f; \
1:
/* %ss, %rsp, %rflags, %cs, %rip, %err, %trapno already on stack */
#define KAIF_SAVE_REGS(base) \
\
rdmsr; \
\
rdmsr; \
\
rdmsr; \
\
#define KAIF_RESTORE_REGS(base) \
\
wrmsr; \
\
wrmsr; \
\
wrmsr; \
\
/*
* Each cpusave buffer has an area set aside for a ring buffer of breadcrumbs.
* The following macros manage the buffer.
*/
/* Advance the ring buffer */
jge 1f; \
/* Advance the pointer and index */ \
jmp 2f; \
1: /* Reset the pointer and index */ \
/* Clear the new crumb */ \
jnz 3b
/* Set a value in the current breadcrumb buffer */
/* Patch point for MSR clearing. */
#define KAIF_MSR_PATCH \
#endif /* _ASM */
#ifdef __cplusplus
}
#endif
#endif /* _KAIF_ASMUTIL_H */