cmd_opl.h revision 25cf1a301a396c38e8adf52c15f537b80d2483f7
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * CDDL HEADER START
25cf1a301a396c38e8adf52c15f537b80d2483f7jl *
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * The contents of this file are subject to the terms of the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Common Development and Distribution License (the "License").
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * You may not use this file except in compliance with the License.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl *
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * or http://www.opensolaris.org/os/licensing.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * See the License for the specific language governing permissions
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * and limitations under the License.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl *
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * When distributing Covered Code, include this CDDL HEADER in each
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * If applicable, add the following below this CDDL HEADER, with the
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * fields enclosed by brackets "[]" replaced with your own identifying
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * information: Portions Copyright [yyyy] [name of copyright owner]
25cf1a301a396c38e8adf52c15f537b80d2483f7jl *
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * CDDL HEADER END
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Copyright 2006 Sun Microsystems, Inc. All rights reserved.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Use is subject to license terms.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#ifndef _CMD_OPL_H
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define _CMD_OPL_H
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#pragma ident "%Z%%M% %I% %E% SMI"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <cmd.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#include <cmd_cpu.h>
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#ifdef __cplusplus
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern "C" {
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_oplinv_urg(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_oplcre(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_opltsb_ctx(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_opltsbp(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_oplpstate(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_opltstate(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_opliug_f(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_opliug_r(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_oplsdc(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_oplwdt(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_opldtlb(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_oplitlb(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_oplcore_err(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_opldae(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_opliae(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t cmd_opluge(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t opl_cmd_oplmtlb(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t opl_cmd_opltlbp(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t opl_cmd_oplinv_sfsr(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t opl_cmd_ue_cpu_det_cpu(fmd_hdl_t *, fmd_event_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nvlist_t *, const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t opl_cmd_ue_cpu_det_io(fmd_hdl_t *, fmd_event_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl nvlist_t *, const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t opl_cmd_mac_common(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t opl_cmd_cpu_hdlr_mem(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t opl_cmd_io_hdlr_mem(fmd_hdl_t *, fmd_event_t *, nvlist_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, cmd_errcl_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern nvlist_t *opl_cmd_cpu_asru_create(uint32_t, uint8_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern nvlist_t *opl_cmd_cpu_rsrc_create(fmd_hdl_t *, uint32_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern opl_cpu_list_t *opl_alloc_struct(fmd_hdl_t *, uint32_t, int);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern void opl_free_struct(fmd_hdl_t *, opl_cpu_list_t *);
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern uint8_t opl_avg(uint_t, uint_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jlextern cmd_evdisp_t opl_cpuue_handler(fmd_hdl_t *, fmd_event_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl const char *, const char *, cmd_ptrsubtype_t, cmd_cpu_t *, cmd_case_t *,
25cf1a301a396c38e8adf52c15f537b80d2483f7jl uint8_t);
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define CPU_EREPORT_STRING "ereport.cpu.SPARC64-VI."
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define OPL_CMU_SIGN "CMU"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define OPL_CHASSIS_DEFAULT "0"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define OPL_CPU_FRU_FMRI FM_FMRI_SCHEME_HC":///" \
25cf1a301a396c38e8adf52c15f537b80d2483f7jl FM_FMRI_LEGACY_HC"="OPL_CMU_SIGN
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define STR_BUFLEN 32
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define LIST_SIZE 5
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Mask for getting the fault address
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * from MARKEDID in UBC Memory UE
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Log Register (Oberon)
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define UBC_UE_ADR_MASK 0x00007FFFFFFFFFFFULL
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * To indicate if the CPU/IO handler is to be used.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define CMD_OPL_HDLR_CPU 1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define CMD_OPL_HDLR_IO 2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * Macors for dealing with "core", "chip"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * or "strand" related operations.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define IS_STRAND 0
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define IS_CORE 1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define IS_CHIP 2
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define STRAND_UPPER_BOUND 1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define CORE_UPPER_BOUND 1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define COREID_SHIFT 1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define CHIPID_SHIFT 3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define STRAND_MASK 1
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define CHIP_OR_CORE_MASK 3
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl/*
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * This is to reference the Oberon
25cf1a301a396c38e8adf52c15f537b80d2483f7jl * UBC memory UE log register payload.
25cf1a301a396c38e8adf52c15f537b80d2483f7jl */
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#define OBERON_UBC_MUE "ubc-mue"
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#ifdef __cplusplus
25cf1a301a396c38e8adf52c15f537b80d2483f7jl}
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif
25cf1a301a396c38e8adf52c15f537b80d2483f7jl
25cf1a301a396c38e8adf52c15f537b80d2483f7jl#endif /* _CMD_OPL_H */