fire.esc revision 0890ae4ef424a732c8f453aac6765c617daf8a24
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License, Version 1.0 only
* (the "License"). You may not use this file except in compliance
* with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* or http://www.opensolaris.org/os/licensing.
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2005 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
#pragma ident "%Z%%M% %I% %E% SMI"
#pragma dictionary "SUN4"
/*
* Eversholt rules for the Fire nexus driver
*/
#define HB_FIT 1000
#define HBUS_FIT 1000
#define PCIEX_DEV_FIT 1000
#define CPU_FIT 500
#define EBUS_FIT 1000
#define LINK_EVENTS_COUNT 10
#define LINK_EVENTS_TIME 1h
/*
* Test for primary or secondary ereports
*/
#define IS_PRIMARY (payloadprop("primary"))
#define IS_SECONDARY (! payloadprop("primary"))
/*
* payload: imu-rds or imu-scs
*
* Extract the request id, the BDF, value in the IMU RDS/SCS log register
*
* PRM 2.0, pg 227-228
* REQ_ID field: bits [47:32]
*
* Example:
* 0x7766554433221100
* ^^^^
*/
#define IMU_REQ_ID_BIT_OFFSET 32
#define IMU_REQ_ID_BIT_MODULO (1 << 16)
#define IMU_MATCH_BDF(imu_rds_scs, b, d, f) \
( (payloadprop("primary")) && \
((((imu_rds_scs) >> IMU_REQ_ID_BIT_OFFSET) % IMU_REQ_ID_BIT_MODULO) \
== ((b << 8) | (d << 3) | f)) \
)
/*
* payload: mmu-tfsr
*
* Extract the request id, the BDF value, in the MMU TFSR register
*
* PRM 2.0, pg 243
* Request ID: bits 15:0
*
* Example:
* 0x7766554433221100
* ^^^^
*/
#define MMU_REQ_ID_BIT_MODULO (1 << 16)
#define MMU_MATCH_BDF(mmu_tfsr, b, d, f) \
( (payloadprop("primary")) && \
(((mmu_tfsr) % MMU_REQ_ID_BIT_MODULO) == ((b << 8) | (d << 3) | f)) \
)
event error.io.fire.jbc.consist-ab@hostbridge/pciexrc;
event error.io.fire.jbc.consist-no-ab@hostbridge/pciexrc;
event error.io.fire.dmc.bad_op@hostbridge/pciexrc;
event error.io.fire.dmc.bad_parity@hostbridge/pciexrc;
event error.io.fire.pec.i-e-buffer-parity@hostbridge/pciexrc;
event error.io.fire.pec.misc-egress@hostbridge/pciexrc ;
event error.io.fire.pec.adjacentnode@hostbridge/pciexrc ;
event error.io.fire.pec.secondary@hostbridge/pciexrc ;
event error.io.fire.pec.fabric_error@hostbridge/pciexrc ;
/*
* Fatal JBC ereport: (mb_pea, cpe, ape, pio_cpe, jtceew, jtceei, jtceer)
* ebus_to ereport:
* The fmri of the ereport is ioboard0/hostbridge0
*
* Other ereports:
* The fmri is ioboard0/hostbridge0/pciexrc[0-1]
*
*/
event ereport.io.fire.jbc.jue@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.pio_unmap@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.pio_unmap_rd@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.jte@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.jbe@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.jtceew@hostbridge{within(5s)};
event ereport.io.fire.jbc.jtceer@hostbridge{within(5s)};
event ereport.io.fire.jbc.jtceei@hostbridge{within(5s)};
event ereport.io.fire.jbc.icise@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.ijp@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.ill_bmw@hostbridge/pciexrc{within(5s)} ;
event ereport.io.fire.jbc.ill_bmr@hostbridge/pciexrc{within(5s)} ;
event ereport.io.fire.jbc.ill_acc@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.ill_acc_rd@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.unsol_rd@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.unsol_intr@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.bjc@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.mb_pea@hostbridge{within(5s)};
event ereport.io.fire.jbc.mb_per@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.mb_pew@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.ebus_to@hostbridge{within(5s)};
/*
* DMC ereports
*
*/
event ereport.io.fire.dmc.byp_err@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.byp_oor@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.trn_err@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.trn_oor@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.tte_inv@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.tte_prt@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.ttc_dpe@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.tbw_dme@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.tbw_ude@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.tbw_err@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.tbw_dpe@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.ttc_cae@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.eq_over@hostbridge/pciexrc{within(5s)};
/*
* TLU Other Event ereports
*
*/
event ereport.io.fire.pec.ihb_pe@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.iip@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.edp@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.ehp@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.eru@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.ero@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.emp@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.epe@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.erp@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.eip@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.link-events-trip@hostbridge/pciexrc ;
/*
* TLU Uncorrectable and Correctable ereports
*/
event ereport.io.fire.pec.ur@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.uc@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.cto@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.rof@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.mfp@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.pois@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.fcp@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.dlp@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.te@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.re@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.bdp@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.btp@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.rnr@hostbridge/pciexrc {within(5s)};
event ereport.io.fire.pec.rto@hostbridge/pciexrc {within(5s)};
/*
* Fire Fabric ereport
* Whenever a leaf device sends an error message (fatal, non-fatal, or CE) to
* root complex, the nexus driver publishes this ereport to log the ereport.
*/
event ereport.io.fire.fabric@hostbridge/pciexrc {within(5s)};
/*
* A faulty Fire hostbridge may cause (* may cause PCI-E abort):
*
* - the following Jbus consistency errors :
* - : jbus unmapped address errors. jue*, pio_unmap, pio_unmap_rd
* - : jbus timeout. jte*
* - : scoreboard timeout errors jtceew,i,r
* - : jbus bus error. jbe*:
* - : illegal coherency install state error. icise*
* - : bad jbus port ijp
* - : bad jbus command bjc
* - : illegal byte enables ill_bmw, ill_bmr*
* - : unsolicited read or intr unsol_rd, insol_intr
* - merge buffer errors mb_pea,w,r
* - mmu data parity errors ttc_dpe*, tbw_dpe*
* - ingress/egress buffer parity errors ihb_pe, iip, edp, ehp
* - misc egress eru, ero, emp, epe, erp, eip
* - too many link up/down/reset etc. events
*/
fru hostbridge/pciexrc;
asru hostbridge/pciexrc;
event fault.io.fire.asic@hostbridge/pciexrc,
FITrate=HB_FIT, FRU=hostbridge/pciexrc, ASRU=hostbridge/pciexrc;
prop fault.io.fire.asic@hostbridge/pciexrc (0)->
error.io.fire.jbc.consist-ab@hostbridge/pciexrc,
error.io.fire.jbc.consist-no-ab@hostbridge/pciexrc,
ereport.io.fire.jbc.mb_pea@hostbridge,
ereport.io.fire.jbc.mb_per@hostbridge/pciexrc,
ereport.io.fire.jbc.mb_pew@hostbridge/pciexrc,
error.io.fire.dmc.bad_parity@hostbridge/pciexrc,
error.io.fire.pec.i-e-buffer-parity@hostbridge/pciexrc,
error.io.fire.pec.misc-egress@hostbridge/pciexrc,
error.io.fire.pec.adjacentnode@hostbridge/pciexrc;
prop error.io.fire.jbc.consist-ab@hostbridge/pciexrc (1)->
ereport.io.fire.jbc.jte@hostbridge/pciexrc,
ereport.io.fire.jbc.jbe@hostbridge/pciexrc,
ereport.io.fire.jbc.jue@hostbridge/pciexrc,
ereport.io.fire.jbc.icise@hostbridge/pciexrc,
ereport.io.fire.jbc.ill_bmr@hostbridge/pciexrc;
prop error.io.fire.jbc.consist-no-ab@hostbridge/pciexrc (1)->
ereport.io.fire.jbc.ijp@hostbridge/pciexrc,
ereport.io.fire.jbc.ill_bmw@hostbridge/pciexrc,
ereport.io.fire.jbc.bjc@hostbridge/pciexrc,
ereport.io.fire.jbc.pio_unmap@hostbridge/pciexrc,
ereport.io.fire.jbc.pio_unmap_rd@hostbridge/pciexrc,
ereport.io.fire.jbc.unsol_rd@hostbridge/pciexrc,
ereport.io.fire.jbc.unsol_intr@hostbridge/pciexrc,
ereport.io.fire.jbc.jtceew@hostbridge,
ereport.io.fire.jbc.jtceei@hostbridge,
ereport.io.fire.jbc.jtceer@hostbridge;
prop error.io.fire.dmc.bad_parity@hostbridge/pciexrc (1)->
ereport.io.fire.dmc.ttc_dpe@hostbridge/pciexrc,
ereport.io.fire.dmc.tbw_dpe@hostbridge/pciexrc;
prop error.io.fire.pec.i-e-buffer-parity@hostbridge/pciexrc (1) ->
ereport.io.fire.pec.ihb_pe@hostbridge/pciexrc,
ereport.io.fire.pec.iip@hostbridge/pciexrc,
ereport.io.fire.pec.ehp@hostbridge/pciexrc,
ereport.io.fire.pec.edp@hostbridge/pciexrc;
prop error.io.fire.pec.misc-egress@hostbridge/pciexrc (1) ->
ereport.io.fire.pec.eru@hostbridge/pciexrc,
ereport.io.fire.pec.ero@hostbridge/pciexrc,
ereport.io.fire.pec.emp@hostbridge/pciexrc,
ereport.io.fire.pec.epe@hostbridge/pciexrc,
ereport.io.fire.pec.erp@hostbridge/pciexrc,
ereport.io.fire.pec.eip@hostbridge/pciexrc;
/*
* EBUS fault
*/
event fault.io.ebus@hostbridge/pciexrc,
FITrate=EBUS_FIT, FRU=hostbridge/pciexrc, ASRU=hostbridge/pciexrc;
/*
* A faulty ebus can cause ebus timeout ebus_to
*/
prop fault.io.ebus@hostbridge/pciexrc (0)->
ereport.io.fire.jbc.ebus_to@hostbridge;
fru cpu;
asru cpu;
event fault.io.datapath@cpu, FITrate=CPU_FIT, FRU=cpu, ASRU=cpu;
/*
* A faulty CPU (datapath) may cause:
*
* - same jbus consistency as fire
* note: we're going to ignore memory async errors, as they should
* always be accompanied by CPU/mem errors diagnosed by CPU diagnosis
*
*/
prop fault.io.datapath@cpu (0)->
error.io.fire.jbc.consist-ab@hostbridge/pciexrc,
error.io.fire.jbc.consist-no-ab@hostbridge/pciexrc;
/*
* hostbus
*/
fru hostbridge;
asru hostbridge;
event fault.io.hbus@hostbridge,
FITrate=HBUS_FIT, FRU=hostbridge, ASRU=hostbridge;
event error.io.fire.jbc.pio_dpe@hostbridge/pciexrc;
event ereport.io.fire.jbc.ape@hostbridge{within(5s)};
event ereport.io.fire.jbc.pio_dpe@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.rd_dpe@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.wr_dpe@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.cpe@hostbridge{within(5s)};
event ereport.io.fire.jbc.pio_cpe@hostbridge{within(5s)};
/* A faulty host bus may cause:
*
* - ape: jbus address parity error.
* - pio_dpe*: jbus PIO write parity error.
* - rd_dpe : jbus DMA read parity error
* - wr_dpe: jbus DMA write parity error.
* - cpe: jbus control parity error.
* - pio_cpe: jbus PIO control parity error.
*/
prop fault.io.hbus@hostbridge (0)->
ereport.io.fire.jbc.ape@hostbridge,
error.io.fire.jbc.pio_dpe@hostbridge/pciexrc,
ereport.io.fire.jbc.rd_dpe@hostbridge/pciexrc,
ereport.io.fire.jbc.wr_dpe@hostbridge/pciexrc,
ereport.io.fire.jbc.cpe@hostbridge,
ereport.io.fire.jbc.pio_cpe@hostbridge;
prop error.io.fire.jbc.pio_dpe@hostbridge/pciexrc (1)->
ereport.io.fire.jbc.pio_dpe@hostbridge/pciexrc ;
event ereport.io.fire.dmc.msi_par_err@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.msi_mal_err@hostbridge/pciexrc{within(5s)};
/*
*
* PCI-E device fault
*
*/
fru pciexbus/pciexdev;
asru pciexbus/pciexdev/pciexfn;
event fault.io.fire.pciex.device@pciexbus/pciexdev/pciexfn,
FRU=pciexbus/pciexdev,
ASRU=pciexbus/pciexdev/pciexfn,
FITrate=PCIEX_DEV_FIT;
/*
* A faulty PCI-E device can cause (chip specific ereports):
*
* malformed or parity error MSI
* eq overflow
*
* Extract the request id in the RDS/SCS log register. It 's the BDF
* value of the device.
*/
prop fault.io.fire.pciex.device@pciexbus[b]/pciexdev[d]/pciexfn[f] (0) ->
ereport.io.fire.dmc.msi_mal_err@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.msi_par_err@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.eq_over@hostbridge/pciexrc
{
/*
* The hw does not capture header log, so indict
* all PCI-E devices under this sub-domain
*/
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
};
/*
* PCI devices
* Similar to the above rules.
*/
fru pcibus/pcidev;
asru pcibus/pcidev/pcifn;
event fault.io.fire.pci.device@pcibus/pcidev/pcifn,
FITrate=HB_FIT,
FRU=pcibus/pcidev,
ASRU=pcibus/pcidev/pcifn;
prop fault.io.fire.pci.device@pcibus[b]/pcidev[d]/pcifn[f] (0) ->
ereport.io.fire.dmc.msi_mal_err@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.msi_par_err@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.eq_over@hostbridge/pciexrc
{
/* All PCI devices under this sub-domain */
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
};
event ereport.io.fire.dmc.msi_not_en@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.cor_not_en@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.nonfatal_not_en@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.fatal_not_en@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.pmpme_not_en@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.pmeack_not_en@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.dmc.eq_not_en@hostbridge/pciexrc{within(5s)};
event error.io.fire.jbc.unsol_retr@hostbridge/pciexrc;
event error.io.fire.dmc.msg_not_en@hostbridge/pciexrc ;
event defect.io.fire.pci.driver@pcibus/pcidev/pcifn;
event defect.io.fire.pciex.driver@pciexbus/pciexdev/pciexfn;
/*
* A faulty bridge or leaf device driver can cause
* - mmu invalid, out of range, protection etc. all except data parity
* - invalid pio r/w
* - unsolicited read or interrupt return
* - msg received to unenabled queue
* - unsupported request
*
* Need to break into multiple prop to avoid the "line to long" runtime error
*/
prop defect.io.fire.pciex.driver@pciexbus[b]/pciexdev[d]/pciexfn[f] (0) ->
/* msg not enable */
ereport.io.fire.dmc.msi_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.cor_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.nonfatal_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.fatal_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.pmpme_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.pmeack_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.eq_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-scs"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
};
prop defect.io.fire.pciex.driver@pciexbus[b]/pciexdev[d]/pciexfn[f] (0) ->
/* bad_op */
ereport.io.fire.dmc.byp_err@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.byp_oor@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.trn_err@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.trn_oor@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.tte_inv@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.tte_prt@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.tbw_dme@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.tbw_ude@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
},
ereport.io.fire.dmc.tbw_err@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pciexbus[b]/pciexdev[d]/pciexfn[f])
};
/* repeat the above prop for PCI devices */
prop defect.io.fire.pci.driver@pcibus[b]/pcidev[d]/pcifn[f] (0) ->
/* msg not enable */
ereport.io.fire.dmc.msi_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.cor_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.nonfatal_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.fatal_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.pmpme_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.pmeack_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-rds"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.eq_not_en@hostbridge/pciexrc
{
IMU_MATCH_BDF(payloadprop("imu-scs"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
};
prop defect.io.fire.pci.driver@pcibus[b]/pcidev[d]/pcifn[f] (0) ->
/* bad_op */
ereport.io.fire.dmc.byp_err@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.byp_oor@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.trn_err@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.trn_oor@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.tte_inv@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.tte_prt@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.tbw_dme@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.tbw_ude@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
},
ereport.io.fire.dmc.tbw_err@hostbridge/pciexrc
{
MMU_MATCH_BDF(payloadprop("mmu-tfsr"), b, d, f) &&
is_under(hostbridge/pciexrc, pcibus[b]/pcidev[d]/pcifn[f])
};
event defect.io.fire.pciex.driver@hostbridge/pciexrc;
/*
* A faulty Fire nexus driver can cause
* - Jbus unmapped error
* - mmu invalid, out of range, protection etc. all except data parity
* - invalid pio r/w
* - unsolicited read or interrupt return
* - msg received to unenabled queue
*/
prop defect.io.fire.pciex.driver@hostbridge/pciexrc (0)->
error.io.fire.dmc.bad_op@hostbridge/pciexrc,
error.io.fire.jbc.unsol_retr@hostbridge/pciexrc,
error.io.fire.dmc.msg_not_en@hostbridge/pciexrc;
prop error.io.fire.dmc.bad_op@hostbridge/pciexrc (1)->
ereport.io.fire.dmc.byp_err@hostbridge/pciexrc,
ereport.io.fire.dmc.byp_oor@hostbridge/pciexrc,
ereport.io.fire.dmc.trn_err@hostbridge/pciexrc,
ereport.io.fire.dmc.trn_oor@hostbridge/pciexrc,
ereport.io.fire.dmc.tte_inv@hostbridge/pciexrc,
ereport.io.fire.dmc.tte_prt@hostbridge/pciexrc,
ereport.io.fire.dmc.tbw_dme@hostbridge/pciexrc,
ereport.io.fire.dmc.tbw_ude@hostbridge/pciexrc,
ereport.io.fire.dmc.tbw_err@hostbridge/pciexrc;
prop error.io.fire.jbc.unsol_retr@hostbridge/pciexrc (1)->
ereport.io.fire.jbc.unsol_rd@hostbridge/pciexrc,
ereport.io.fire.jbc.unsol_intr@hostbridge/pciexrc;
prop error.io.fire.dmc.msg_not_en@hostbridge/pciexrc (1)->
ereport.io.fire.dmc.msi_not_en@hostbridge/pciexrc,
ereport.io.fire.dmc.cor_not_en@hostbridge/pciexrc,
ereport.io.fire.dmc.nonfatal_not_en@hostbridge/pciexrc,
ereport.io.fire.dmc.fatal_not_en@hostbridge/pciexrc,
ereport.io.fire.dmc.pmpme_not_en@hostbridge/pciexrc,
ereport.io.fire.dmc.pmeack_not_en@hostbridge/pciexrc,
ereport.io.fire.dmc.eq_not_en@hostbridge/pciexrc;
engine serd.io.fire.link-events@hostbridge/pciexrc,
N=LINK_EVENTS_COUNT, T=LINK_EVENTS_TIME, method=persistent,
trip=ereport.io.fire.link-events-trip@hostbridge/pciexrc ;
event upset.io.fire.link-events@hostbridge/pciexrc ,
engine=serd.io.fire.link-events@hostbridge/pciexrc ;
event error.io.fire.link-events@hostbridge/pciexrc ;
event ereport.io.fire.pec.lin@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.lrs@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.ldn@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.lup@hostbridge/pciexrc{within(5s)};
prop upset.io.fire.link-events@hostbridge/pciexrc (0)->
error.io.fire.link-events@hostbridge/pciexrc ;
prop error.io.fire.link-events@hostbridge/pciexrc (1)->
ereport.io.fire.pec.lin@hostbridge/pciexrc ,
ereport.io.fire.pec.lrs@hostbridge/pciexrc ,
ereport.io.fire.pec.ldn@hostbridge/pciexrc ,
ereport.io.fire.pec.lup@hostbridge/pciexrc ;
/*
* Fault at the adjacent node which is right below the Fire ASIC
*/
fru hostbridge/pciexrc/pciexbus/pciexdev;
asru hostbridge/pciexrc/pciexbus/pciexdev/pciexfn;
event fault.io.fire.pciex.device@hostbridge/pciexrc/pciexbus/pciexdev/pciexfn,
FITrate=HB_FIT, FRU=hostbridge/pciexrc/pciexbus/pciexdev,
ASRU=hostbridge/pciexrc/pciexbus/pciexdev/pciexfn;
/*
* Faulty adjacent node may cause
* too many link int/up/down/reset events
*/
prop fault.io.fire.pciex.device@hostbridge/pciexrc/pciexbus/pciexdev/pciexfn
(0) ->
error.io.fire.pec.adjacentnode@hostbridge/pciexrc
{
is_under(hostbridge/pciexrc,
hostbridge/pciexrc/pciexbus/pciexdev/pciexfn)
};
prop error.io.fire.pec.adjacentnode@hostbridge/pciexrc (0) ->
ereport.io.fire.link-events-trip@hostbridge/pciexrc;
/*
* Secondary errors of the ereport that the device is at fault.
* Undiagnosed the secondary errors since the payload is invalid.
*/
prop error.io.fire.pec.secondary@hostbridge/pciexrc (0) ->
ereport.io.fire.dmc.msi_par_err@hostbridge/pciexrc{ IS_SECONDARY },
ereport.io.fire.dmc.msi_mal_err@hostbridge/pciexrc{ IS_SECONDARY },
ereport.io.fire.dmc.eq_over@hostbridge/pciexrc{ IS_SECONDARY };
/*
* For logging purpose only.
* The Fire nexus driver generates equivalent pciex ereports for the
* common pciex rules to diagnose.
*/
prop error.io.fire.pec.fabric_error@hostbridge/pciexrc(0) ->
ereport.io.fire.pec.cto@hostbridge/pciexrc,
ereport.io.fire.pec.ur@hostbridge/pciexrc,
ereport.io.fire.pec.uc@hostbridge/pciexrc,
ereport.io.fire.pec.cto@hostbridge/pciexrc,
ereport.io.fire.pec.rof@hostbridge/pciexrc,
ereport.io.fire.pec.mfp@hostbridge/pciexrc,
ereport.io.fire.pec.pois@hostbridge/pciexrc,
ereport.io.fire.pec.fcp@hostbridge/pciexrc,
ereport.io.fire.pec.dlp@hostbridge/pciexrc,
ereport.io.fire.pec.te@hostbridge/pciexrc,
ereport.io.fire.pec.re@hostbridge/pciexrc,
ereport.io.fire.pec.bdp@hostbridge/pciexrc,
ereport.io.fire.pec.btp@hostbridge/pciexrc,
ereport.io.fire.pec.rnr@hostbridge/pciexrc,
ereport.io.fire.pec.rto@hostbridge/pciexrc;
/* add memory async ereports */
event ereport.io.fire.jbc.ce_asyn@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.jbc.ue_asyn@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.mrc@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.wuc@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.ruc@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.pec.crs@hostbridge/pciexrc{within(5s)};
event ereport.io.fire.nodiag@hostbridge;
/*
* Upset used to hide ereports that are not currently diagnosed.
*/
engine serd.io.fire.nodiag@hostbridge,
N=1000, T=1s, method=persistent,
trip=ereport.io.fire.nodiag@hostbridge;
event upset.io.fire.nodiag@hostbridge,
engine=serd.io.fire.nodiag@hostbridge;
prop upset.io.fire.nodiag@hostbridge (0)->
ereport.io.fire.jbc.ue_asyn@hostbridge/pciexrc,
ereport.io.fire.jbc.ce_asyn@hostbridge/pciexrc,
ereport.io.fire.jbc.ill_acc@hostbridge/pciexrc,
ereport.io.fire.jbc.ill_acc_rd@hostbridge/pciexrc,
ereport.io.fire.dmc.ttc_cae@hostbridge/pciexrc,
ereport.io.fire.pec.mrc@hostbridge/pciexrc,
ereport.io.fire.pec.wuc@hostbridge/pciexrc,
ereport.io.fire.pec.ruc@hostbridge/pciexrc,
ereport.io.fire.pec.crs@hostbridge/pciexrc,
ereport.io.fire.nodiag@hostbridge,
error.io.fire.pec.secondary@hostbridge/pciexrc,
error.io.fire.pec.fabric_error@hostbridge/pciexrc,
ereport.io.fire.fabric@hostbridge/pciexrc
;