intel.esc revision 26733bfee3481fa399a355cfb6327271bdf3d391
/*
* CDDL HEADER START
*
* The contents of this file are subject to the terms of the
* Common Development and Distribution License (the "License").
* You may not use this file except in compliance with the License.
*
* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
* See the License for the specific language governing permissions
* and limitations under the License.
*
* When distributing Covered Code, include this CDDL HEADER in each
* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
* If applicable, add the following below this CDDL HEADER, with the
* fields enclosed by brackets "[]" replaced with your own identifying
* information: Portions Copyright [yyyy] [name of copyright owner]
*
* CDDL HEADER END
*/
/*
* Copyright 2009 Sun Microsystems, Inc. All rights reserved.
* Use is subject to license terms.
*/
/*
*/
/*
* Ereports for Simple error codes.
*/
/*
* Propogations for all but "external" and "unknown" simple errors.
* If the error is uncorrected we produce a fault immediately, otherwise
* we diagnose it to an upset and decalre a fault when the SERD engine
* trips.
*/
/*
* Ereports for Compound error codes. These are in pairs "foo" and "foo_uc"
* for the corrected and uncorrected version of each error type. All are
*/
/*
* Ereports for Compound error codes - intel errors
*/
/*
* Ereports for Compound error codes - TLB errors
*/
/*
* Ereports for Compound error codes - memory hierarchy errors
*/
/*
* Ereports for Compound error codes - bus and interconnect errors
*/
/*
* Compound error propogations.
*
* We resist the temptation propogate, for example, a single dcache fault
* to all ereports mentioning dcache (l0dcache, l1dcache, l2dcache, dcache).
* Instead we will diagnose a distinct fault for each possible cache level,
* whether or not current chips have dcaches at all levels.
*
* Corrected errors are SERDed and produce a fault when the engine fires;
* the same fault is diagnosed immediately for a corresponding uncorrected
* error.
*/
\
\
\
\
/* errors detected in northbridge */
/*
* SET_ADDR and SET_OFFSET are used to set a payload value in the fault that
* we diagnose for page faults, to record the physical address of the faulting
* page.
*/
retire=0;
/*
* CPU integrated memory controller
*/
payloadprop_contains("resource", \
(!payloadprop_defined("resource[0].hc-specific.offset") || \
setpayloadprop("asru-offset", \
payloadprop("resource[0].hc-specific.offset")))
{within(12s)};
payloadprop_defined("resource[0].hc-specific.offset")) &&
{ CONTAINS_RANK } (1)->
payloadprop_defined("resource[0].hc-specific.offset")) &&
{within(12s)};
{ payloadprop_contains("resource", asru(motherboard/chip/memory-controller/dram-channel/dimm)) } (1)->
N=2, T=72h;
{ payloadprop_contains("resource",
{within(1s)};
/* Diagnose corrected events to upsets */
{ !STATUS_UC } (1)->
N=3, T=72h;
/* Diagnose uncorrected events to faults */
{ STATUS_UC } (0)->