Searched refs:zap (Results 1 - 2 of 2) sorted by relevance
/vbox/src/VBox/VMM/VMMR3/ |
H A D | HM.cpp | 1026 uint64_t zap; local 1044 zap = pVM->hm.s.vmx.Msrs.VmxPinCtls.n.disallowed0; 1045 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PIN_EXEC_EXT_INT_EXIT); 1046 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PIN_EXEC_NMI_EXIT); 1047 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PIN_EXEC_VIRTUAL_NMI); 1048 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PIN_EXEC_PREEMPT_TIMER); 1052 zap = pVM->hm.s.vmx.Msrs.VmxProcCtls.n.disallowed0; 1053 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PROC_EXEC_INT_WINDOW_EXIT); 1054 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PROC_EXEC_USE_TSC_OFFSETTING); 1055 HMVMX_REPORT_FEATURE(val, zap, VMX_VMCS_CTRL_PROC_EXEC_HLT_EXI [all...] |
/vbox/src/VBox/VMM/VMMR0/ |
H A D | HMVMXR0.cpp | 2336 uint32_t zap = pVM->hm.s.vmx.Msrs.VmxPinCtls.n.allowed1; /* Bits cleared here must always be cleared. */ local 2351 if ((val & zap) != val) 2353 LogRel(("hmR0VmxSetupPinCtls: invalid pin-based VM-execution controls combo! cpu=%#RX64 val=%#RX64 zap=%#RX64\n", 2354 pVM->hm.s.vmx.Msrs.VmxPinCtls.n.disallowed0, val, zap)); 2381 uint32_t zap = pVM->hm.s.vmx.Msrs.VmxProcCtls.n.allowed1; /* Bits cleared here must be cleared in the VMCS. */ local 2474 if ((val & zap) != val) 2476 LogRel(("hmR0VmxSetupProcCtls: invalid processor-based VM-execution controls combo! cpu=%#RX64 val=%#RX64 zap=%#RX64\n", 2477 pVM->hm.s.vmx.Msrs.VmxProcCtls.n.disallowed0, val, zap)); 2493 zap = pVM->hm.s.vmx.Msrs.VmxProcCtls2.n.allowed1; /* Bits cleared here must be cleared in the VMCS. */ 2532 if ((val & zap) ! 3298 uint32_t zap = pVM->hm.s.vmx.Msrs.VmxEntry.n.allowed1; /* Bits cleared here must be cleared in the VMCS. */ local 3368 uint32_t zap = pVM->hm.s.vmx.Msrs.VmxExit.n.allowed1; /* Bits cleared here must be cleared in the VMCS. */ local [all...] |
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