Searched refs:aHostCpus (Results 1 - 3 of 3) sorted by relevance

/vbox/src/VBox/VMM/VMMR0/
H A DGVMMR0.cpp253 /** The number of entries in the host CPU array (aHostCpus). */
256 GVMMHOSTCPU aHostCpus[1]; member in struct:GVMM
329 PGVMM pGVMM = (PGVMM)RTMemAllocZ(RT_UOFFSETOF(GVMM, aHostCpus[cHostCpus]));
390 pGVMM->aHostCpus[iCpu].idxCpuSet = iCpu;
392 pGVMM->aHostCpus[iCpu].Ppt.pTimer = NULL;
393 pGVMM->aHostCpus[iCpu].Ppt.hSpinlock = NIL_RTSPINLOCK;
394 pGVMM->aHostCpus[iCpu].Ppt.uMinHz = 5; /** @todo Add some API which figures this one out. (not *that* important) */
395 pGVMM->aHostCpus[iCpu].Ppt.cTicksHistoriziationInterval = 1;
396 //pGVMM->aHostCpus[iCpu].Ppt.iTickHistorization = 0;
397 //pGVMM->aHostCpus[iCp
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/vbox/include/VBox/vmm/
H A Dgvmm.h143 /** The number of valid entries in aHostCpus. */
146 GVMMSTATSHOSTCPU aHostCpus[RTCPUSET_MAX_CPUS]; member in struct:GVMMSTATS
/vbox/src/VBox/VMM/VMMR3/
H A DSTAM.cpp2693 stamR3RegisterU(pUVM, &pUVM->stam.s.GVMMStats.aHostCpus[iCpu].idCpu, NULL, NULL,
2696 stamR3RegisterU(pUVM, &pUVM->stam.s.GVMMStats.aHostCpus[iCpu].idxCpuSet, NULL, NULL,
2699 stamR3RegisterU(pUVM, &pUVM->stam.s.GVMMStats.aHostCpus[iCpu].uDesiredHz, NULL, NULL,
2702 stamR3RegisterU(pUVM, &pUVM->stam.s.GVMMStats.aHostCpus[iCpu].uTimerHz, NULL, NULL,
2705 stamR3RegisterU(pUVM, &pUVM->stam.s.GVMMStats.aHostCpus[iCpu].cChanges, NULL, NULL,
2708 stamR3RegisterU(pUVM, &pUVM->stam.s.GVMMStats.aHostCpus[iCpu].cStarts, NULL, NULL,

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