Searched refs:TR (Results 1 - 7 of 7) sorted by relevance
| /vbox/src/VBox/Runtime/common/asm/ |
| H A D | ASMGetTR.asm | 35 ; Get the TR register.
36 ; @returns TR.
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| /vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkPkg/Include/Framework/ |
| H A D | SmmCis.h | 167 UINT32 TR; member in struct:__anon10569
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| /vbox/include/VBox/vmm/ |
| H A D | hm_svm.h | 194 /** TR read. */
202 /** TR write. */
324 /** 9 Intercept reads of TR. */
332 /** 13 Intercept writes of TR. */
703 /** Offset 0x490 - Guest TR register + hidden parts. */
704 SVMSEL TR; member in struct:SVMVMCB::__anon351
822 AssertCompileMemberOffset(SVMVMCB, guest.TR, 0x490);
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| /vbox/src/VBox/VMM/VMMR0/ |
| H A D | HMSVMR0.cpp | 1333 /* Guest TR. */
1336 HMSVM_LOAD_SEG_REG(TR, tr);
2014 * Guest TR.
2015 * Fixup TR attributes so it's compatible with Intel. Important when saved-states are used
2018 HMSVM_SAVE_SEG_REG(TR, tr);
2826 Log4(("guest.TR.u16Sel %RTsel\n", pVmcb->guest.TR.u16Sel));
2827 Log4(("guest.TR.u16Attr %#x\n", pVmcb->guest.TR.u16Attr));
2828 Log4(("guest.TR
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| H A D | HMR0A.asm | 294 ; When restoring the TR, we must first clear the busy flag or we'll end up faulting.
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| H A D | HMVMXR0.cpp | 2902 * Saves the host segment registers and GDTR, IDTR, (TR, GS and FS bases) into
2963 * Host TR segment register.
3067 * Host TR base. Verify that TR selector doesn't point past the GDT. Masking off the TI and RPL bits
3071 ("hmR0VmxSaveHostSegmentRegs: TR selector exceeds limit. TR=%RTsel cbGdt=%#x\n", uSelTR, Gdtr.cbGdt),
3078 /* We need the 64-bit TR base for hybrid darwin. */
3090 * VT-x unconditionally restores the TR limit to 0x67 and type to 11 (32-bit busy TSS) on all VM-exits.
3108 /* Store the GDTR here as we need it while restoring TR. */
4524 * Loads the guest segment registers, GDTR, IDTR, LDTR, (TR, F
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| /vbox/src/VBox/VMM/VMMR3/ |
| H A D | CPUMDbg.cpp | 1206 CPU_REG_SEG(TR, tr),
1334 CPU_REG_SEG(TR, tr),
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