Searched refs:AR_PHY_PLL_MODE (Results 1 - 2 of 2) sorted by relevance
/vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/ath/ath9k/ |
H A D | phy.h | 49 #define AR_PHY_PLL_MODE 0x16184 macro
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H A D | ath9k_hw.c | 663 REG_SET_BIT(ah, AR_PHY_PLL_MODE, 0x1 << 16); 676 regval = REG_READ(ah, AR_PHY_PLL_MODE); 678 REG_WRITE(ah, AR_PHY_PLL_MODE, regval); 685 regval = REG_READ(ah, AR_PHY_PLL_MODE); 688 REG_WRITE(ah, AR_PHY_PLL_MODE, regval); 689 REG_WRITE(ah, AR_PHY_PLL_MODE, 690 REG_READ(ah, AR_PHY_PLL_MODE) & 0xfffeffff);
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