Searched refs:DEBUG1 (Results 1 - 25 of 28) sorted by relevance

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/illumos-gate/usr/src/uts/sun4u/io/pci/
H A Dpcix.c62 DEBUG1(DBG_INIT_CLD, child, "pcix_set_cmd_reg: pcix_cap_ptr = %x\n",
72 DEBUG1(DBG_INIT_CLD, child, "pcix_set_cmd_reg: PCI-X CMD Register "
78 DEBUG1(DBG_INIT_CLD, child, "pcix_set_cmd_reg: PCI-X CMD Register "
H A Dpci_pwr.c287 DEBUG1(DBG_PWR, pwr_p->pwr_dip, "new_lvl: "
298 DEBUG1(DBG_PWR, pwr_p->pwr_dip, "new_lvl: unknown "
310 DEBUG1(DBG_PWR, pwr_p->pwr_dip,
315 DEBUG1(DBG_PWR, pwr_p->pwr_dip,
320 DEBUG1(DBG_PWR, pwr_p->pwr_dip,
325 DEBUG1(DBG_PWR, pwr_p->pwr_dip,
364 DEBUG1(DBG_PWR, pwr_p->pwr_dip,
464 DEBUG1(DBG_PWR, pwr_p->pwr_dip,
504 DEBUG1(DBG_PWR, pwr_p->pwr_dip,
H A Dpci_iommu.c125 DEBUG1(DBG_ATTACH, dip, "iommu_create: allocated size=%x\n",
302 DEBUG1(DBG_MAP_WIN, dip, "iommu_map_pages: redzone pg=%x\n",
350 DEBUG1(DBG_UNMAP_WIN|DBG_CONT, 0, " %x", dvma_pg);
395 DEBUG1(DBG_UNMAP_WIN|DBG_CONT, dip, " %x", pg_index);
398 DEBUG1(DBG_UNMAP_WIN|DBG_CONT, dip, " (context %x)", ctx);
H A Dpci_sc.c173 DEBUG1(DBG_ATTACH, dip,
H A Dpci_intr.c472 DEBUG1(DBG_A_INTX, dip, "ino %x is invalid\n", ino);
522 DEBUG1(DBG_A_INTX, dip, "dup intr #%d\n",
656 DEBUG1(DBG_R_INTX, dip,
679 DEBUG1(DBG_R_INTX, dip, "can't get mondo for ino %x\n", ino);
717 DEBUG1(DBG_R_INTX, dip, "success! mondo=%x\n", mondo);
H A Dpcipsy.c535 DEBUG1(DBG_IB, dip, "pci_xlate_intr: done ino=%x\n", intr);
765 DEBUG1(DBG_R_INTX, dip, "remove xintr %x\n", ino);
897 DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf status reg=%x\n", s);
899 DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf status reg==%x\n",
903 DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg==%llx\n", l);
919 DEBUG1(DBG_ATTACH, dip, "pbm_configure: %d mhz\n",
988 DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg=%llx\n", l);
996 DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg==%llx\n", l);
1009 DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg=%llx\n", l);
1017 DEBUG1(DBG_ATTAC
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H A Dpci_ib.c105 DEBUG1(DBG_ATTACH, dip, "ib_create: numproxy=%x\n",
908 DEBUG1(DBG_IB, dip, "ib_get_intr_target: ino %x\n", ino);
915 DEBUG1(DBG_IB, dip, "ib_get_intr_target: cpu_id %x\n", *cpu_id_p);
947 DEBUG1(DBG_IB, dip, "ib_set_intr_target: orig mapreg value: 0x%llx\n",
979 DEBUG1(DBG_IB, dip,
992 DEBUG1(DBG_IB, dip, "Writing new mapreg value:0x%llx\n",
H A Dsimba.c72 #define DEBUG1(f, s, a) if ((f)& simba_debug_flags) \ macro
93 #define DEBUG1(f, s, a) macro
383 DEBUG1(D_ATTACH, "attach(%p) ATTACH\n", devi);
643 DEBUG1(D_CTLOPS, "simba_ctlops(): *result=%lx\n", *(off_t *)result);
706 DEBUG1(D_INIT_CLD, "simba_initchild(): child=%p\n", child);
H A Dpci_dma.c77 DEBUG1(DBG_SC|DBG_CONT, dip, " %x", dvma_addr);
666 DEBUG1(DBG_DMA_MAP|DBG_CONT, dip, "%x ", pfn);
674 DEBUG1(DBG_DMA_MAP, dip, "pp=%p pfns=", pp);
679 DEBUG1(DBG_DMA_MAP|DBG_CONT, dip, "%x ", pfn);
946 DEBUG1(DBG_DMA_MAP, dip, "fast: ctx=0x%x\n", ctx);
1257 DEBUG1(DBG_BYPASS, mp->dmai_rdip, "pg0 adjust %lx\n", pg_offset);
1266 DEBUG1(DBG_BYPASS, mp->dmai_rdip, "last pg adjust %lx\n", pg_offset);
1269 DEBUG1(DBG_BYPASS, mp->dmai_rdip, "win off %p\n", win_offset);
H A Dpcisch.c723 DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg=%llx\n", l);
739 DEBUG1(DBG_ATTACH, dip, "pbm_configure: %d mhz\n",
850 DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg=%llx\n", l);
895 DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg=%llx\n", l);
921 DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg=%llx\n", l);
930 DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf command reg=%x\n", s);
939 DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf status reg=%x\n", s);
950 DEBUG1(DBG_ATTACH, dip,
972 DEBUG1(DBG_ATTACH, dip, "pbm_configure: Setting XMITS"
1054 DEBUG1(DBG_DMA_MA
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H A Dpci_util.c115 DEBUG1(DBG_ATTACH, dip, "get_pci_properties: numproxy=%d\n",
121 DEBUG1(DBG_ATTACH, dip, "get_pci_properties: thermal_interrupt=%d\n",
H A Dpci_pbm.c115 DEBUG1(DBG_ATTACH, dip, "pbm_create: conf=%x\n",
H A Dpci_pci.c471 DEBUG1(DBG_ATTACH, devi,
984 DEBUG1(DBG_INIT_CLD, child, "Turning on XMITS NCPQ "
1294 DEBUG1(DBG_PWR, dip, "ppb_pwr(): ENTER level = %d\n", lvl);
1433 DEBUG1(DBG_PWR, dip, "ppb_set_pwr: set PM state to %s\n\n", str);
H A Dpci.c503 DEBUG1(DBG_MAP | DBG_CONT, dip, " r#=%x", r_no);
656 DEBUG1(DBG_DMA_ALLOCH, dip, "mp=%p\n", mp);
828 DEBUG1(DBG_DMA_WIN, dip, "%x out of range\n", win);
H A Dpci_tools.c757 DEBUG1(DBG_TOOLS, dip, "bar returned is 0x%llx\n", *bar);
827 DEBUG1(DBG_TOOLS, dip, "config access: data:0x%llx\n", prg->data);
919 DEBUG1(DBG_TOOLS, dip,
H A Dpci_ecc.c90 DEBUG1(DBG_ATTACH, dip, "ecc_create: csr=%x\n", ecc_p->ecc_csr_pa);
/illumos-gate/usr/src/uts/sun/io/dada/conf/
H A Ddcd_confsubr.c115 #ifdef DEBUG1
163 #ifdef DEBUG1
180 #ifdef DEBUG1
246 #ifdef DEBUG1
263 #ifdef DEBUG1
291 #ifdef DEBUG1
/illumos-gate/usr/src/cmd/rmt/
H A Drmt.c124 #define DEBUG1(f, a) if (debug) (void) fprintf(debug, (f), (a)) macro
286 DEBUG1("rmtd: %c\n", key);
302 DEBUG1("rmtd: s%c\n", key);
361 DEBUG1("rmtd: W %s\n", count);
368 DEBUG1(gettext("%s: premature eof\n"),
386 DEBUG1("rmtd: R %s\n", count);
421 DEBUG1("rmtd: C %s\n", device);
475 DEBUG1("rmtd: A %lld\n", rval);
/illumos-gate/usr/src/uts/sun4u/sys/pci/
H A Dpci_debug.h95 #define DEBUG1(flag, dip, fmt, a1) \ macro
115 #define DEBUG1(flag, dip, fmt, a1) macro
/illumos-gate/usr/src/uts/common/io/hotplug/hpcsvc/
H A Dhpcsvc.c51 #define DEBUG1(fmt, a1) \ macro
59 #define DEBUG1(fmt, a1) macro
454 DEBUG1("hpc_slot_register: %s", bus);
471 DEBUG1("hpc_slot_register: %s not in bus list", bus);
597 DEBUG1("hpc_slot_unregister: callback returned %x", r);
607 DEBUG1("hpc_slot_unregister: freeing slot, bus_slot_list=%x",
696 DEBUG1("hpc_remove_event_handler: handle=%x", handle);
852 DEBUG1("hpc_slot_event_dispatcher: busp=%x", busp);
/illumos-gate/usr/src/uts/sun4/io/
H A Dpcicfg.c235 #define DEBUG1(fmt, a1)\ macro
247 #define DEBUG1(fmt, a1) macro
679 DEBUG1("device port_type = %x\n", port_type);
841 DEBUG1("Next Function - %x\n", func);
956 DEBUG1("ntbridge bus range start ->[%d]\n", next_bus);
1063 DEBUG1("ntbridge: finish probing 2nd bus, rc=%d\n", rc);
1118 DEBUG1("pcicfg: now unloading the ntbridge driver. rc1=%d\n", rc1);
1241 DEBUG1("Configuring children for %llx\n", dip);
1389 DEBUG1("cannot destroy ntbridge memory map size=%x\n",
1395 DEBUG1("canno
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/illumos-gate/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c194 #define DEBUG1(fmt, a1)\ macro
209 #define DEBUG1(fmt, a1) macro
710 DEBUG1("Next Function - %x\n", func);
834 DEBUG1("ntbridge bus range start ->[%d]\n", next_bus);
931 DEBUG1("ntbridge: finish probing 2nd bus, rc=%d\n", rc);
980 DEBUG1("pcicfg: now unloading the ntbridge driver. rc1=%d\n", rc1);
1113 DEBUG1("Configuring children for %p\n", dip);
1385 DEBUG1("ntbridge child: no \"%s\" property\n",
1406 DEBUG1("Failed to get assigned-addresses property %llx\n", dip);
1409 DEBUG1("pcicf
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/illumos-gate/usr/src/uts/sun/io/dada/impl/
H A Ddcd_hba.c193 #ifdef DEBUG1
389 #ifdef DEBUG1
/illumos-gate/usr/src/uts/sun4u/montecarlo/io/
H A Dhsc.c246 DEBUG1("hsc_connect: slot %d connection failed",
274 DEBUG1("hsc_connect: slot %d connected",
304 DEBUG1("hsc_disconnect: slot %d", hsp->hs_slot_number);
470 DEBUG1("hsc_get_slot_state: slot %d", hsp->hs_slot_number);
521 DEBUG1("hsc_set_config_state: slot %d", hsp->hs_slot_number);
655 DEBUG1("hsc_autoconfig: slot %d", hsp->hs_slot_number);
714 DEBUG1("hsc_slot_enable: slot %d", hsp->hs_slot_number);
814 DEBUG1("hsc_disable_slot: slot %d", hsp->hs_slot_number);
835 DEBUG1("hsc_disable_slot: slot %d", hsp->hs_slot_number);
997 DEBUG1("hsc_slot_unregiste
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/illumos-gate/usr/src/uts/sun4u/montecarlo/sys/
H A Dscsb.h686 #define DEBUG1(fmt, a1)\ macro
698 #define DEBUG1(fmt, a1) macro

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