| H A D | t4_hw.c | 52 u32 val = t4_read_reg(adapter, reg); local 54 if (!!(val & mask) == polarity) { 56 *valp = val; 76 * @val: the new value for the register field 82 t4_set_reg_field(struct adapter *adapter, unsigned int addr, u32 mask, u32 val) argument 86 t4_write_reg(adapter, addr, v | val); 476 u16 val; local 486 t4_os_pci_read_cfg2(adapter, base + PCI_VPD_ADDR, &val); 487 } while (!(val & PCI_VPD_ADDR_F) && --attempts); 489 if (!(val 511 u16 val; local 743 sf1_write(struct adapter *adapter, unsigned int byte_cnt, int cont, int lock, u32 val) argument 846 unsigned int i, c, left, val, offset = addr & 0xff; local 1322 t4_cim_write1(struct adapter *adap, unsigned int addr, unsigned int val) argument 1357 unsigned int cfg, val, idx; local 1409 u32 cfg, val, req, rsp; local 1474 unsigned int i, cfg, val, idx; local 2503 rd_rss_row(struct adapter *adap, int row, u32 *val) argument 2520 u32 val; local 2593 t4_write_rss_pf_config(struct adapter *adapter, unsigned int index, u32 val) argument 2766 u32 val[A_TP_MIB_TCP_RXT_SEG_LO - A_TP_MIB_TCP_OUT_RST + 1]; local 2873 u32 val[2]; local 2894 u32 val[4]; local 2978 t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr, unsigned int mask, unsigned int val) argument 3047 t4_load_mtus(struct adapter *adap, const unsigned short *mtus, const unsigned short *alpha, const unsigned short *beta) argument 3760 t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, unsigned int mmd, unsigned int reg, unsigned int val) argument 4203 t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int nparams, const u32 *params, u32 *val) argument 4243 t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf, unsigned int vf, unsigned int nparams, const u32 *params, const u32 *val) argument 4866 u16 val; local [all...] |