H A D | px_hlib.c | 169 static uint64_t msiq_suspend(devhandle_t dev_hdl, pxu_t *pxu_p); 170 static void msiq_resume(devhandle_t dev_hdl, pxu_t *pxu_p); 171 static void jbc_init(caddr_t xbc_csr_base, pxu_t *pxu_p); 172 static void ubc_init(caddr_t xbc_csr_base, pxu_t *pxu_p); 182 hvio_cb_init(caddr_t xbc_csr_base, pxu_t *pxu_p) argument 184 switch (PX_CHIP_TYPE(pxu_p)) { 186 ubc_init(xbc_csr_base, pxu_p); 189 jbc_init(xbc_csr_base, pxu_p); 193 PX_CHIP_TYPE(pxu_p)); 203 jbc_init(caddr_t xbc_csr_base, pxu_t *pxu_p) argument 254 ubc_init(caddr_t xbc_csr_base, pxu_t *pxu_p) argument 291 hvio_ib_init(caddr_t csr_base, pxu_t *pxu_p) argument 314 ilu_init(caddr_t csr_base, pxu_t *pxu_p) argument 337 tlu_init(caddr_t csr_base, pxu_t *pxu_p) argument 728 lpu_init(caddr_t csr_base, pxu_t *pxu_p) argument 1516 dlu_init(caddr_t csr_base, pxu_t *pxu_p) argument 1547 dmc_init(caddr_t csr_base, pxu_t *pxu_p) argument 1586 hvio_pec_init(caddr_t csr_base, pxu_t *pxu_p) argument 1630 mmu_tte_to_pa(uint64_t tte, pxu_t *pxu_p) argument 1654 mmu_bypass_noncache(pxu_t *pxu_p) argument 1680 mmu_tsb_entries(caddr_t csr_base, pxu_t *pxu_p) argument 1698 hvio_mmu_init(caddr_t csr_base, pxu_t *pxu_p) argument 1787 hvio_iommu_map(devhandle_t dev_hdl, pxu_t *pxu_p, tsbid_t tsbid, pages_t pages, io_attributes_t io_attr, void *addr, size_t pfn_index, int flags) argument 1853 hvio_iommu_demap(devhandle_t dev_hdl, pxu_t *pxu_p, tsbid_t tsbid, pages_t pages) argument 1882 hvio_iommu_getmap(devhandle_t dev_hdl, pxu_t *pxu_p, tsbid_t tsbid, io_attributes_t *attr_p, r_addr_t *r_addr_p) argument 1908 hvio_obptsb_attach(pxu_t *pxu_p) argument 1950 pxu_t *pxu_p = (pxu_t *)px_p->px_plat_p; local 1980 hvio_get_bypass_base(pxu_t *pxu_p) argument 2003 hvio_get_bypass_end(pxu_t *pxu_p) argument 2026 hvio_iommu_getbypass(devhandle_t dev_hdl, pxu_t *pxu_p, r_addr_t ra, io_attributes_t attr, io_addr_t *io_addr_p) argument 2047 hvio_intr_devino_to_sysino(devhandle_t dev_hdl, pxu_t *pxu_p, devino_t devino, sysino_t *sysino) argument 2172 hvio_intr_gettarget(devhandle_t dev_hdl, pxu_t *pxu_p, sysino_t sysino, cpuid_t *cpuid) argument 2198 hvio_intr_settarget(devhandle_t dev_hdl, pxu_t *pxu_p, sysino_t sysino, cpuid_t cpuid) argument 2246 hvio_msiq_init(devhandle_t dev_hdl, pxu_t *pxu_p) argument 2671 hvio_suspend(devhandle_t dev_hdl, pxu_t *pxu_p) argument 2732 hvio_resume(devhandle_t dev_hdl, devino_t devino, pxu_t *pxu_p) argument 2809 hvio_cb_suspend(devhandle_t dev_hdl, pxu_t *pxu_p) argument 2848 hvio_cb_resume(devhandle_t pci_dev_hdl, devhandle_t xbus_dev_hdl, devino_t devino, pxu_t *pxu_p) argument 2912 msiq_suspend(devhandle_t dev_hdl, pxu_t *pxu_p) argument 2940 msiq_resume(devhandle_t dev_hdl, pxu_t *pxu_p) argument 3457 pxu_t *pxu_p = (pxu_t *)px_p->px_plat_p; local 3500 pxu_t *pxu_p = (pxu_t *)px_p->px_plat_p; local [all...] |