Searched defs:phy (Results 1 - 14 of 14) sorted by relevance

/vbox/src/VBox/Devices/Network/testcase/
H A DtstDevPhy.cpp58 PPHY phy; member in class:PhyTest
69 phy = new PHY;
70 Phy::init(phy, 0, PHY_EPID_M881000);
75 delete phy;
109 Phy::writeMDIO(phy, data & mask);
124 data |= Phy::readMDIO(phy) ? 1 : 0;
/vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/
H A Dpcnet32.c153 pcnet32_mdio_read ( struct net_device *netdev, int phy, int reg ) argument
164 ( ( phy & 0x1f ) << 5 ) | ( reg & 0x1f ) );
173 __unused pcnet32_mdio_write ( struct net_device *netdev, int phy, int reg, int val ) argument
183 ( ( phy & 0x1f ) << 5 ) | ( reg & 0x1f ) );
H A Depic100.c112 unsigned int phy, phy_idx; local
194 for (phy = 0, phy_idx = 0; phy < 32 && phy_idx < sizeof(phys); phy++) {
195 int mii_status = mii_read(phy, 0);
198 phys[phy_idx++] = phy;
200 printf("MII transceiver found at address %d.\n", phy);
H A Djme.c40 jme_mdio_read(struct net_device *netdev, int phy, int reg) argument
47 smi_phy_addr(phy) |
58 DBG("phy(%d) read timeout : %d\n", phy, reg);
70 int phy, int reg, int val)
77 smi_phy_addr(phy) | smi_reg_addr(reg));
87 DBG("phy(%d) write timeout : %d\n", phy, reg);
1249 * Bring down phy before interface is opened.
69 jme_mdio_write(struct net_device *netdev, int phy, int reg, int val) argument
H A Dsis190.c697 struct sis190_phy *phy, *phy_home, *phy_default, *phy_lan; local
704 list_for_each_entry(phy, &tp->first_phy, list) {
705 status = mdio_read_latched(ioaddr, phy->phy_id, MII_BMSR);
710 (phy->type != UNKNOWN)) {
711 phy_default = phy;
713 status = mdio_read(ioaddr, phy->phy_id, MII_BMCR);
714 mdio_write(ioaddr, phy->phy_id, MII_BMCR,
716 if (phy->type == HOME)
717 phy_home = phy;
718 else if (phy
748 sis190_init_phy(struct sis190_private *tp, struct sis190_phy *phy, unsigned int phy_id, u16 mii_status) argument
822 struct sis190_phy *phy; local
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H A Dtlan.c223 u32 phy[2]; member in struct:tlan_private
391 u32 phy; local
400 phy = priv->phy[priv->phyNum];
413 TLan_MiiReadReg(nic, phy, MII_PHYSID1, &tlphy_id1);
414 TLan_MiiReadReg(nic, phy, MII_PHYSID2, &tlphy_id2);
421 TLan_MiiReadReg(nic, phy, MII_BMSR, &status);
423 TLan_MiiReadReg(nic, phy, MII_BMSR, &status);
427 TLan_MiiReadReg(nic, phy, MII_LPA, &partner);
428 TLan_MiiReadReg(nic, phy, TLAN_TLPHY_PA
1107 TLan_MiiReadReg(struct nic *nic __unused, u16 phy, u16 reg, u16 * val) argument
1261 TLan_MiiWriteReg(struct nic *nic __unused, u16 phy, u16 reg, u16 val) argument
1352 u32 phy; local
1442 u16 phy; local
1473 u16 phy; local
1567 u16 phy; local
1668 u16 phy; local
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H A Dw89c840.c699 int phy, phy_idx = 0; local
700 for (phy = 1; phy < 32 && phy_idx < 4; phy++) {
701 int mii_status = mdio_read(ioaddr, phy, 1);
703 w840private.phys[phy_idx++] = phy;
704 w840private.advertising = mdio_read(ioaddr, phy, 4);
708 "%X advertising %hX.\n", phy, mii_status, w840private.advertising);
H A Dsundance.c622 int phy, phy_idx = 0; local
625 for (phy = 1; phy < 32 && phy_idx < MII_CNT; phy++) {
626 int mii_status = mdio_read(nic, phy, MII_BMSR);
628 sdc->phys[phy_idx++] = phy;
630 mdio_read(nic, phy, MII_ADVERTISE);
634 ( "%s: MII PHY found at address %d, status " "%hX advertising %hX\n", sdc->nic_name, phy, mii_status, sdc->mii_if.advertising );
H A Dtulip.c1400 unsigned int phy, phy_idx;
1413 for (phy = 0, phy_idx = 0; phy < 32 && phy_idx < sizeof(tp->phys);
1414 phy++) {
1415 int mii_status = mdio_read(nic, phy, 1);
1418 int mii_reg0 = mdio_read(nic, phy, 0);
1419 int mii_advert = mdio_read(nic, phy, 4);
1429 tp->phys[phy_idx++] = phy;
1431 tp->nic_name, phy, mii_reg0, mii_status, mii_advert);
1435 tp->nic_name, to_advert, phy, mii_adver
1386 unsigned int phy, phy_idx; local
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H A Dvia-rhine.c517 unsigned long phy:1; member in struct:rhine_rx_desc::VTC_rx_status_tag::__anon15462
/vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/ath/ath9k/
H A Dath9k_xmit.c446 int phy; local
460 phy = CHANNEL_CCK;
462 phy = CHANNEL_OFDM;
479 phy, rate->bitrate * 100, len, rix, is_sp);
H A Dath9k_hw.c138 u8 phy, int kbps,
147 switch (phy) {
181 "Unknown phy %d (rate ix %d)\n", phy, rateix);
137 ath9k_hw_computetxtime(struct ath_hw *ah, u8 phy, int kbps, u32 frameLen, u16 rateix, int shortPreamble) argument
/vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/tg3/
H A Dtg3_phy.c512 u32 otp, phy; local
522 phy = ((otp & TG3_OTP_AGCTGT_MASK) >> TG3_OTP_AGCTGT_SHIFT);
523 phy |= MII_TG3_DSP_TAP1_AGCTGT_DFLT;
524 tg3_phydsp_write(tp, MII_TG3_DSP_TAP1, phy);
526 phy = ((otp & TG3_OTP_HPFFLTR_MASK) >> TG3_OTP_HPFFLTR_SHIFT) |
528 tg3_phydsp_write(tp, MII_TG3_DSP_AADJ1CH0, phy);
530 phy = ((otp & TG3_OTP_LPFDIS_MASK) >> TG3_OTP_LPFDIS_SHIFT);
531 phy |= MII_TG3_DSP_AADJ1CH3_ADCCKADJ;
532 tg3_phydsp_write(tp, MII_TG3_DSP_AADJ1CH3, phy);
534 phy
564 u32 phy; local
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/vbox/src/VBox/Devices/Network/
H A DDevE1000.cpp1186 PHY phy; member in struct:E1kState_st
2532 Phy::setLinkStatus(&pThis->phy, true);
2561 Phy::setLinkStatus(&pThis->phy, false);
2597 if (Phy::readMDIO(&pThis->phy))
2665 Phy::writeMDIO(&pThis->phy, !!(value & CTRL_MDIO));
2669 if (Phy::readMDIO(&pThis->phy))
2818 E1kLog(("%s WARNING! Access to invalid PHY detected, phy=%d.\n",
2834 SET_BITS(MDIC, DATA, Phy::readRegister(&pThis->phy, GET_BITS_V(value, MDIC, REG)));
2836 Phy::writeRegister(&pThis->phy, GET_BITS_V(value, MDIC, REG), value & MDIC_DATA_MASK);
6511 /* Always set the phy lin
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