Searched refs:u64IntInfo (Results 1 - 5 of 5) sorted by relevance
/vbox/src/VBox/VMM/include/ |
H A D | HMInternal.h | 787 uint64_t u64IntInfo; member in struct:HMCPU::__anon16905
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/vbox/src/VBox/VMM/testcase/ |
H A D | tstVMStructSize.cpp | 421 CHECK_MEMBER_ALIGNMENT(HMCPU, Event.u64IntInfo, 8);
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/vbox/src/VBox/VMM/VMMR0/ |
H A D | HMSVMR0.cpp | 2346 pVCpu->hm.s.Event.u64IntInfo = pEvent->u; 2463 Event.u = pVCpu->hm.s.Event.u64IntInfo; 2696 Event.u = pVCpu->hm.s.Event.u64IntInfo; 3055 Event.u = pVCpu->hm.s.Event.u64IntInfo; 4104 Log4(("IDT: Pending vectoring #DF %#RX64 uIdtVector=%#x uExitVector=%#x\n", pVCpu->hm.s.Event.u64IntInfo, 4111 pVCpu->hm.s.Event.u64IntInfo, uIdtVector, uExitVector)); 5039 * AMD-V does not provide us with the original exception but we have it in u64IntInfo since we
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H A D | HMVMXR0.cpp | 350 static int hmR0VmxInjectEventVmcs(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint64_t u64IntInfo, uint32_t cbInstr, 5756 pVCpu->hm.s.Event.u64IntInfo = u32IntInfo; 5917 pVCpu->hm.s.Event.u64IntInfo, pVCpu->hm.s.Event.u32ErrCode)); 5927 pVCpu->hm.s.Event.u64IntInfo, uIdtVector, uExitVector)); 7013 uint32_t uVectorType = VMX_IDT_VECTORING_INFO_TYPE(pVCpu->hm.s.Event.u64IntInfo); 7014 uint32_t uVector = VMX_IDT_VECTORING_INFO_VECTOR(pVCpu->hm.s.Event.u64IntInfo); 7015 bool fErrorCodeValid = VMX_IDT_VECTORING_INFO_ERROR_CODE_IS_VALID(pVCpu->hm.s.Event.u64IntInfo); 7631 uint32_t uIntType = VMX_EXIT_INTERRUPTION_INFO_TYPE(pVCpu->hm.s.Event.u64IntInfo); 7655 Log4(("Injecting pending event vcpu[%RU32] u64IntInfo=%#RX64 Type=%#x\n", pVCpu->idCpu, pVCpu->hm.s.Event.u64IntInfo, 7924 hmR0VmxInjectEventVmcs(PVMCPU pVCpu, PCPUMCTX pMixedCtx, uint64_t u64IntInfo, uint32_t cbInstr, uint32_t u32ErrCode, RTGCUINTREG GCPtrFaultAddress, bool fStepping, uint32_t *puIntrState) argument [all...] |
/vbox/src/VBox/VMM/VMMR3/ |
H A D | HM.cpp | 3029 rc = SSMR3PutU64(pSSM, pVM->aCpus[i].hm.s.Event.u64IntInfo); 3128 rc = SSMR3GetU64(pSSM, &pVM->aCpus[i].hm.s.Event.u64IntInfo);
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