Searched refs:outb (Results 1 - 25 of 125) sorted by relevance

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/vbox/src/VBox/Devices/PC/ipxe/src/arch/i386/core/
H A Dpic8259.c40 outb ( ICR_EOI_NON_SPECIFIC, PIC2_ICR );
42 outb ( ICR_EOI_NON_SPECIFIC, PIC1_ICR );
53 outb ( ( ICR_EOI_SPECIFIC | ICR_VALUE ( CHAINED_IRQ ) ),
56 outb ( ( ICR_EOI_SPECIFIC | ICR_VALUE ( irq ) ), ICR_REG ( irq ) );
H A Dtimer2.c78 outb((inb(PPC_PORTB) & ~PPCB_SPKR) | PPCB_T2GATE, PPC_PORTB);
80 outb(TIMER2_SEL|WORD_ACCESS|MODE0|BINARY_COUNT, TIMER_MODE_PORT);
82 outb(ticks & 0xFF, TIMER2_PORT);
84 outb(ticks >> 8, TIMER2_PORT);
/vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/
H A Dne2k_isa.c48 outb(D8390_COMMAND_RD2 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND);
49 outb(cnt, eth_nic_base + D8390_P0_RBCR0);
50 outb(cnt >> 8, eth_nic_base + D8390_P0_RBCR1);
51 outb(src, eth_nic_base + D8390_P0_RSAR0);
52 outb(src >> 8, eth_nic_base + D8390_P0_RSAR1);
53 outb(D8390_COMMAND_RD0 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND);
71 outb(D8390_COMMAND_RD2 | D8390_COMMAND_STA, eth_nic_base + D8390_P0_COMMAND);
72 outb(D8390_ISR_RDC, eth_nic_base + D8390_P0_ISR);
73 outb(cnt, eth_nic_base + D8390_P0_RBCR0);
74 outb(cn
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H A Dns8390.c134 outb(src & 0xff, eth_asic_base + WD_GP2);
135 outb(src >> 8, eth_asic_base + WD_GP2);
137 outb(D8390_COMMAND_RD2 |
139 outb(cnt, eth_nic_base + D8390_P0_RBCR0);
140 outb(cnt>>8, eth_nic_base + D8390_P0_RBCR1);
141 outb(src, eth_nic_base + D8390_P0_RSAR0);
142 outb(src>>8, eth_nic_base + D8390_P0_RSAR1);
143 outb(D8390_COMMAND_RD0 |
147 outb(src & 0xff, eth_asic_base + _3COM_DALSB);
148 outb(sr
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H A Deepro.c276 #define eepro_full_reset(ioaddr) outb(RESET_CMD, ioaddr); udelay(255);
281 outb ( SEL_RESET_CMD, ioaddr ); \
287 #define eepro_clear_int(ioaddr) outb(ALL_MASK, ioaddr + STATUS_REG)
290 #define eepro_en_rx(ioaddr) outb(RCV_ENABLE_CMD, ioaddr)
293 #define eepro_dis_rx(ioaddr) outb(RCV_DISABLE_CMD, ioaddr)
296 #define eepro_sw2bank0(ioaddr) outb(BANK0_SELECT, ioaddr)
297 #define eepro_sw2bank1(ioaddr) outb(BANK1_SELECT, ioaddr)
298 #define eepro_sw2bank2(ioaddr) outb(BANK2_SELECT, ioaddr)
318 outb(temp_reg & 0xEF, nic->ioaddr + eeprom_reg);
320 outb(ni
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H A D3c509.c81 outb ( 0x00, t509_id_port );
85 outb ( 0x00, t509_id_port );
89 outb ( 0xc0, t509_id_port );
93 outb ( 0xd0, t509_id_port );
97 outb ( 0xd0 | tag, t509_id_port );
101 outb ( 0xd8 | tag, t509_id_port );
105 outb ( 0xe0 | ( ioaddr >> 4 ), t509_id_port );
109 outb ( GLOBAL_RESET, ioaddr + EP_COMMAND );
113 outb ( 0x80 | offset, t509_id_port );
127 outb (
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/vbox/src/VBox/Devices/PC/ipxe/src/arch/i386/interface/pcbios/
H A Drtc_entropy.c61 "outb %%al, %1\n\t"
65 "outb %%al, $0xa0\n\t"
66 "outb %%al, $0x20\n\t"
99 outb ( ( RTC_STATUS_B | CMOS_DISABLE_NMI ), CMOS_ADDRESS );
101 outb ( ( RTC_STATUS_B | CMOS_DISABLE_NMI ), CMOS_ADDRESS );
102 outb ( ( status_b | RTC_STATUS_B_PIE ), CMOS_DATA );
105 outb ( CMOS_DEFAULT_ADDRESS, CMOS_ADDRESS );
117 outb ( ( RTC_STATUS_B | CMOS_DISABLE_NMI ), CMOS_ADDRESS );
119 outb ( ( RTC_STATUS_B | CMOS_DISABLE_NMI ), CMOS_ADDRESS );
120 outb ( ( status_
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/vbox/src/VBox/Devices/PC/BIOS/
H A Dbios.c87 outb(cmos_port, cmos_reg);
97 outb(cmos_port, cmos_reg);
98 outb(cmos_port + 1, val);
111 outb(PIC_MASTER, PIC_CMD_RD_ISR); // Read master ISR
114 outb(PIC_SLAVE, PIC_CMD_RD_ISR); // Read slave ISR
118 outb(PIC_SLAVE_MASK, imr | isrB ); // Mask this interrupt
119 outb(PIC_SLAVE, PIC_CMD_EOI); // Send EOI on slave PIC
123 outb(PIC_MASTER_MASK, imr | isrA); // Mask this interrupt
125 outb(PIC_MASTER, PIC_CMD_EOI); // Send EOI on master PIC
145 outb(BX_DEBUG_POR
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H A Dparallel.c57 outb(addr, regs.u.r8.al);
59 outb(addr+2, val8 | 0x01); // send strobe
60 outb(addr+2, val8 & ~0x01);
67 outb(addr+2, val8 & ~0x04); // send init
68 outb(addr+2, val8 | 0x04);
H A Data.c148 outb(iobase2+ATA_CB_DC, ATA_CB_DC_HD15 | ATA_CB_DC_NIEN | ATA_CB_DC_SRST);
159 outb(iobase2+ATA_CB_DC, ATA_CB_DC_HD15 | ATA_CB_DC_NIEN);
164 outb(iobase1+ATA_CB_DH, slave?ATA_CB_DH_DEV1:ATA_CB_DH_DEV0);
192 outb(iobase2+ATA_CB_DC, ATA_CB_DC_HD15);
244 outb(iobase2+ATA_CB_DC, ATA_CB_DC_HD15);
260 outb(iobase1 + ATA_CB_SC, (count & 0xff00) >> 8);
261 outb(iobase1 + ATA_CB_SN, sector);
262 outb(iobase1 + ATA_CB_CL, cylinder & 0x00ff);
263 outb(iobase1 + ATA_CB_CH, cylinder >> 8);
275 outb(iobase
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H A Dfloppy.c130 outb(0x03f2, val8 & ~0x04);
131 outb(0x03f2, val8 | 0x04);
156 outb(0x03f2, dor);
164 outb(0x03f7, val8);
224 outb(0x03f5, 0x4a); // 4a: Read ID (MFM)
225 outb(0x03f5, drive); // 0=drive0, 1=drive1, head always 0
262 outb(0x03f5, 0x07); // 07: Recalibrate
263 outb(0x03f5, drive); // 0=drive0, 1=drive1
575 outb(0x000a, 0x06);
578 outb(
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H A Dserial.c58 outb(addr+3, inb(addr+3) | 0x80);
60 outb(addr, 0x17);
61 outb(addr+1, 0x04);
64 outb(addr, val16 & 0xFF);
65 outb(addr+1, val16 >> 8);
67 outb(addr+3, regs.u.r8.al & 0x1F);
81 if (timeout) outb(addr, regs.u.r8.al);
H A Dscsi.c98 outb(io_base + VBSCSI_REGISTER_COMMAND, target_id); /* Write the target ID. */
99 outb(io_base + VBSCSI_REGISTER_COMMAND, SCSI_TXDIR_FROM_DEVICE); /* Write the transfer direction. */
100 outb(io_base + VBSCSI_REGISTER_COMMAND, sizes); /* Write CDB size and top bufsize bits. */
101 outb(io_base + VBSCSI_REGISTER_COMMAND, length); /* Write the buffer size. */
102 outb(io_base + VBSCSI_REGISTER_COMMAND, (length >> 8));
104 outb(io_base + VBSCSI_REGISTER_COMMAND, aCDB[i]);
113 outb(io_base + VBSCSI_REGISTER_RESET, 0);
149 outb(io_base + VBSCSI_REGISTER_COMMAND, target_id); /* Write the target ID. */
150 outb(io_base + VBSCSI_REGISTER_COMMAND, SCSI_TXDIR_TO_DEVICE); /* Write the transfer direction. */
151 outb(io_bas
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/vbox/src/VBox/Devices/PC/ipxe/src/arch/i386/include/
H A Dvga.h30 #define write_crtc(data,addr) outb(addr,CRT_IC); outb(data,CRT_DC)
31 #define write_att(data,addr) inb(IS1_RC); inb(0x80); outb(addr,ATT_IW); inb(0x80); outb(data,ATT_IW); inb(0x80)
32 #define write_seq(data,addr) outb(addr,SEQ_I); outb(data,SEQ_D)
33 #define write_gra(data,addr) outb(addr,GRA_I); outb(data,GRA_D)
/vbox/src/VBox/Additions/x11/x11include/xorg-server-1.3.0.0/
H A Dscoasm.h85 asm void outb(port,val) function
90 outb (%dx)
94 outb (%dx)
98 outb (%dx)
102 outb (%dx)
/vbox/src/VBox/Additions/x11/x11include/xorg-server-1.4.2/
H A Dscoasm.h85 asm void outb(port,val) function
90 outb (%dx)
94 outb (%dx)
98 outb (%dx)
102 outb (%dx)
/vbox/src/VBox/Additions/x11/x11include/xorg-server-1.5.3/
H A Dscoasm.h85 asm void outb(port,val) function
90 outb (%dx)
94 outb (%dx)
98 outb (%dx)
102 outb (%dx)
/vbox/src/VBox/Additions/x11/x11include/xorg-server-1.6.5/
H A Dscoasm.h85 asm void outb(port,val) function
90 outb (%dx)
94 outb (%dx)
98 outb (%dx)
102 outb (%dx)
/vbox/src/VBox/Additions/x11/x11include/xorg-server-1.7.7/
H A Dscoasm.h85 asm void outb(port,val) function
90 outb (%dx)
94 outb (%dx)
98 outb (%dx)
102 outb (%dx)
/vbox/src/VBox/Additions/x11/x11include/xorg-server-1.8.0/
H A Dscoasm.h85 asm void outb(port,val) function
90 outb (%dx)
94 outb (%dx)
98 outb (%dx)
102 outb (%dx)
/vbox/src/VBox/Additions/x11/x11include/xorg-server-1.9.0/
H A Dscoasm.h85 asm void outb(port,val) function
90 outb (%dx)
94 outb (%dx)
98 outb (%dx)
102 outb (%dx)
/vbox/src/VBox/Additions/x11/x11include/4.3/programs/Xserver/hw/xfree86/common/
H A Dscoasm.h55 asm void outb(port,val) function
60 outb (%dx)
64 outb (%dx)
68 outb (%dx)
72 outb (%dx)
/vbox/src/VBox/Additions/x11/x11include/xorg-server-1.1.0/
H A Dscoasm.h86 asm void outb(port,val) function
91 outb (%dx)
95 outb (%dx)
99 outb (%dx)
103 outb (%dx)
/vbox/src/VBox/Additions/x11/x11include/xorg-server-1.0.1/
H A Dscoasm.h86 asm void outb(port,val) function
91 outb (%dx)
95 outb (%dx)
99 outb (%dx)
103 outb (%dx)
/vbox/src/VBox/Devices/PC/ipxe/src/arch/i386/transitions/
H A Dliba20.S71 outb %al, $0x80
149 outb %al, $KC_CMD
152 outb %al, $KC_RDWR
155 outb %al, $KC_CMD
175 1: outb %al, $0x80
181 outb %al, $0x80
215 outb %al, $SCP_A

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