| /vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/ |
| H A D | prism2_pci.c | 37 printf ( "Prism2.5 has registers at %#lx\n", pci->membase );
38 hw->membase = ioremap ( pci->membase, 0x100 );
40 nic->ioaddr = pci->membase;
|
| H A D | etherfabric_nic.h | 182 void *membase; member in struct:efab_nic
|
| H A D | myri10ge.c | 973 void *membase; local
978 membase = phys_to_virt ( pci_dev->membase );
982 priv->command = membase + MXGEFW_ETH_CMD;
1033 priv->irq_claim = membase + data[0];
1038 priv->irq_deassert = membase + data[0];
1044 * ( ( uint32 * ) ( membase + data[0] ) ) = 0;
1095 priv->transmit_ring = membase + data[0];
1101 priv->receive_post_ring = membase + data[0];
|
| H A D | skeleton.c | 252 skel->regs = ioremap ( pci->membase, SKELETON_BAR_SIZE );
|
| H A D | prism2.c | 132 void *membase; member in struct:hfa384x
141 /* The global instance of the hardware (i.e. where we store iobase and membase, in the absence of anywhere better to put them */
189 return readw ( hw->membase + reg );
199 writew ( val, hw->membase + reg );
|
| H A D | etherfabric.c | 1190 writel ( (value), (efab)->membase + (reg) )
1191 #define _falcon_readl( efab, reg ) readl ( (efab)->membase + (reg) )
4108 if ( efab->membase ) {
4111 iounmap ( efab->membase );
4112 efab->membase = NULL;
4149 /* Get iobase/membase */
4152 efab->membase = ioremap ( mmio_start, mmio_len );
4154 mmio_len, mmio_start, efab->membase );
4198 iounmap ( efab->membase );
4199 efab->membase
[all...] |
| H A D | hfa384x.h | 2531 char __iomem *membase; member in struct:hfa384x
2703 UINT8 __iomem *membase);
2955 /* printk(KERN_DEBUG "Reading from 0x%0x\n", hw->membase + reg); */
2959 return __le16_to_cpu(readw(hw->membase + reg));
2985 writew(__cpu_to_le16(val), hw->membase + reg);
3010 return readw(hw->membase + reg);
3036 writew(val, hw->membase + reg);
|
| H A D | myson.c | 614 myson->regs = ioremap ( pci->membase, MYSON_BAR_SIZE );
|
| H A D | natsemi.c | 865 natsemi->regs = ioremap ( pci->membase, NATSEMI_BAR_SIZE );
|
| H A D | atl1e.c | 1146 if (!pdev->membase) {
1151 adapter->hw.hw_addr = bus_to_virt(pdev->membase);
|
| H A D | b44.c | 674 bp->regs = ioremap(pci->membase, B44_REGS_SIZE);
|
| H A D | intel.c | 781 intel->regs = ioremap ( pci->membase, INTEL_BAR_SIZE );
|
| H A D | jme.c | 1193 jme->regs = ioremap(pci->membase, JME_REGS_SIZE);
|
| H A D | realtek.c | 937 rtl->regs = ioremap ( pci->membase, RTL_BAR_SIZE );
|
| H A D | sis190.c | 895 ioaddr = ioremap(pdev->membase, SIS190_REGS_SIZE);
|
| /vbox/src/VBox/Devices/PC/ipxe/src/drivers/bus/ |
| H A D | pci.c | 103 * Read membase and ioaddr for a PCI device
108 * valid memory BAR is recorded as pci_device::membase, and the first
126 if ( ! pci->membase )
127 pci->membase =
247 PCI_ARGS ( pci ), pci->membase, pci->ioaddr, pci->irq );
|
| /vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/ath/ath9k/ |
| H A D | ath9k.c | 141 mem = ioremap(pdev->membase, 0x10000);
|
| /vbox/src/VBox/Devices/PC/ipxe/src/include/ipxe/ |
| H A D | pci.h | 299 unsigned long membase; member in struct:pci_device
|
| /vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/ath/ath5k/ |
| H A D | ath5k.c | 323 mem = ioremap(pdev->membase, 0x10000);
364 DBG("ath5k: register base at %p (%08lx)\n", sc->iobase, pdev->membase);
|
| /vbox/src/VBox/Devices/PC/ipxe/src/drivers/infiniband/ |
| H A D | linda.c | 2341 linda->regs = ioremap ( pci->membase, LINDA_BAR0_SIZE );
2342 DBGC2 ( linda, "Linda %p has BAR at %08lx\n", linda, pci->membase );
|
| H A D | qib7322.c | 2300 qib7322->regs = ioremap ( pci->membase, QIB7322_BAR0_SIZE );
2302 qib7322, pci->membase );
|