Searched refs:generateStdTestGregMemSib (Results 1 - 1 of 1) sorted by relevance

/vbox/src/VBox/VMM/testcase/Instructions/
H A DInstructionTestGen.py783 def generateStdTestGregMemSib(self, oGen, cAddrBits, cbEffOp, cbMaxOp, iOp1, auInputs): member in class:InstrTest_MemOrGreg_2_Greg
891 self.generateStdTestGregMemSib(oGen, cAddrBits, cbEffOp, cbMaxOp, oGen.iModReg, auShortInputs);
1190 # self.generateStdTestGregMemSib(oGen, cAddrBits, cbEffOp, cbMaxOp, oGen.iModReg, auShortInputs);

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