Searched refs:UINT64 (Results 1 - 25 of 1065) sorted by relevance

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/vbox/src/VBox/Devices/EFI/Firmware/BaseTools/Source/C/GenPage/
H A DVirtualMemory.h40 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
41 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
42 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
43 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
44 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
45 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
46 UINT64 Reserved:1; // Reserved
47 UINT64 MustBeZero:2; // Must Be Zero
48 UINT64 Available:3; // Available for use by system software
49 UINT64 PageTableBaseAddres
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/vbox/src/VBox/Devices/EFI/Firmware/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/
H A DArchRegisters.h29 UINT64 Rip;
30 UINT64 DataOffset;
73 UINT64 Dr0;
74 UINT64 Dr1;
75 UINT64 Dr2;
76 UINT64 Dr3;
77 UINT64 Dr6;
78 UINT64 Dr7;
79 UINT64 Eflags;
80 UINT64 Ldt
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/vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/
H A DAcpiS3Save.h39 UINT64 Uint64;
55 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
56 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
57 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
58 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
59 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
60 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
61 UINT64 Reserved:1; // Reserved
62 UINT64 MustBeZero:2; // Must Be Zero
63 UINT64 Availabl
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/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Core/DxeIplPeim/X64/
H A DVirtualMemory.h44 UINT64 Uint64;
60 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
61 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
62 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
63 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
64 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
65 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
66 UINT64 Reserved:1; // Reserved
67 UINT64 MustBeZero:2; // Must Be Zero
68 UINT64 Availabl
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/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Include/IndustryStandard/
H A DPal.h105 UINT64 IsUnified : 1;
106 UINT64 Attributes : 2;
107 UINT64 Associativity:8;
108 UINT64 LineSize:8;
109 UINT64 Stride:8;
110 UINT64 StoreLatency:8;
111 UINT64 StoreHint:8;
112 UINT64 LoadHint:8;
120 UINT64 CacheSize:32;
121 UINT64 AliasBoundar
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/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Include/Library/
H A DSalLib.h49 IN UINT64 Index,
50 IN UINT64 Arg2,
51 IN UINT64 Arg3,
52 IN UINT64 Arg4,
53 IN UINT64 Arg5,
54 IN UINT64 Arg6,
55 IN UINT64 Arg7,
56 IN UINT64 Arg8
H A DPalLib.h56 IN UINT64 Index,
57 IN UINT64 Arg2,
58 IN UINT64 Arg3,
59 IN UINT64 Arg4
H A DTimerLib.h61 UINT64
90 UINT64
93 OUT UINT64 *StartValue, OPTIONAL
94 OUT UINT64 *EndValue OPTIONAL
108 UINT64
111 IN UINT64 Ticks
/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BaseLib/
H A DSwapBytes64.c32 UINT64
35 IN UINT64 Value
H A DDivU64x64Remainder.c39 UINT64
42 IN UINT64 Dividend,
43 IN UINT64 Divisor,
44 OUT UINT64 *Remainder OPTIONAL
H A DMultU64x64.c34 UINT64
37 IN UINT64 Multiplicand,
38 IN UINT64 Multiplier
41 UINT64 Result;
H A DMultU64x32.c34 UINT64
37 IN UINT64 Multiplicand,
41 UINT64 Result;
H A DARShiftU64.c32 UINT64
35 IN UINT64 Operand,
H A DDivU64x32.c36 UINT64
39 IN UINT64 Dividend,
H A DGetPowerOfTwo64.c33 UINT64
36 IN UINT64 Operand
H A DLRotU64.c33 UINT64
36 IN UINT64 Operand,
H A DLShiftU64.c32 UINT64
35 IN UINT64 Operand,
H A DRRotU64.c33 UINT64
36 IN UINT64 Operand,
/vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkPkg/Include/Framework/
H A DSmmCis.h190 UINT64 reserved;
191 UINT64 r1;
192 UINT64 r2;
193 UINT64 r3;
194 UINT64 r4;
195 UINT64 r5;
196 UINT64 r6;
197 UINT64 r7;
198 UINT64 r8;
199 UINT64 r
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/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal/CapsulePei/
H A DCapsule.h52 UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory
53 UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write
54 UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User
55 UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching
56 UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached
57 UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)
58 UINT64 Reserved:1; // Reserved
59 UINT64 MustBeZero:2; // Must Be Zero
60 UINT64 Available:3; // Available for use by system software
61 UINT64 PageTableBaseAddres
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/vbox/src/VBox/Devices/EFI/Firmware/PerformancePkg/Library/TscTimerLib/
H A DBaseTscTimerLib.c38 UINT64
/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Include/Protocol/
H A DDebugSupport.h164 UINT64 Rip;
165 UINT64 DataOffset;
193 UINT64 ExceptionData;
195 UINT64 Dr0;
196 UINT64 Dr1;
197 UINT64 Dr2;
198 UINT64 Dr3;
199 UINT64 Dr6;
200 UINT64 Dr7;
201 UINT64 Cr
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/vbox/src/VBox/Devices/PC/ipxe/src/include/ipxe/efi/Protocol/
H A DDebugSupport.h166 UINT64 Rip;
167 UINT64 DataOffset;
195 UINT64 ExceptionData;
197 UINT64 Dr0;
198 UINT64 Dr1;
199 UINT64 Dr2;
200 UINT64 Dr3;
201 UINT64 Dr6;
202 UINT64 Dr7;
203 UINT64 Cr
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/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/BasePalLibNull/
H A DPalCall.c48 IN UINT64 Index,
49 IN UINT64 Arg2,
50 IN UINT64 Arg3,
51 IN UINT64 Arg4
56 Ret.Status = (UINT64) -1;
/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal/EbcDxe/Ipf/
H A DEbcSupport.h32 #define OPCODE_NOP (UINT64) 0x00008000000
33 #define OPCODE_BR_COND_SPTK_FEW (UINT64) 0x00100000000
34 #define OPCODE_MOV_BX_RX (UINT64) 0x00E00100000

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