Searched refs:PHY (Results 1 - 5 of 5) sorted by relevance

/vbox/src/VBox/Devices/Network/
H A DDevE1000Phy.h3 * DevE1000Phy - Intel 82540EM Ethernet Controller Internal PHY Emulation, Header.
72 * Emulation state of PHY.
76 /** Network controller instance this PHY is attached to. */
86 /** PHY register offset selected for MDIO operation. */
102 typedef struct Phy::Phy_st PHY; typedef in typeref:struct:Phy_st
103 typedef PHY *PPHY;
107 /** Initialize PHY. */
109 /** Read PHY register at specified address. */
111 /** Write to PHY register at specified address. */
123 /** Save PHY stat
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H A DDevE1000.cpp309 #define RCTL_LBM_TCVR UINT32_C(3) /**< PHY or external SerDes loopback. */
1186 PHY phy;
2580 * Get the link status from PHY.
2596 /* MDC is high and MDIO pin is used for input, read MDIO pin from PHY */
2647 * Change the status (but not PHY status) anyway as Windows expects
2664 /* MDIO direction pin is set to output and MDC is high, write MDIO pin value to PHY */
2795 * Handles PHY read/write requests; forwards requests to internal PHY device.
2816 else if (GET_BITS_V(value, MDIC, PHY) != 1)
2818 E1kLog(("%s WARNING! Access to invalid PHY detecte
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/vbox/src/VBox/Devices/Network/testcase/
H A DtstDevPhy.cpp3 * PHY MDIO unit tests.
24 * Test fixture for PHY MDIO/MDC interface emulation.
69 phy = new PHY;
/vbox/src/VBox/Devices/PC/ipxe/src/drivers/net/rtl818x/
H A Drtl818x.h140 u8 PHY[4]; member in struct:rtl818x_csr
H A Drtl818x.c54 rtl818x_iowrite32(priv, (u32 *)&priv->map->PHY[0], buf | 0x80);
56 rtl818x_iowrite32(priv, (u32 *)&priv->map->PHY[0], buf);
57 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))

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