Searched refs:EfiCpuIoWidthUint64 (Results 1 - 8 of 8) sorted by relevance

/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Include/Protocol/
H A DCpuIo2.h47 EfiCpuIoWidthUint64, enumerator in enum:__anon12035
68 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
72 or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
/vbox/src/VBox/Devices/PC/ipxe/src/include/ipxe/efi/Protocol/
H A DCpuIo2.h49 EfiCpuIoWidthUint64, enumerator in enum:__anon15603
70 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
74 or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
/vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkPkg/Library/DxeIoLibCpuIo/
H A DIoLib.c370 return IoReadWorker (Port, EfiCpuIoWidthUint64);
401 return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
592 return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
621 return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/DxeIoLibCpuIo2/
H A DIoLib.c365 return IoReadWorker (Port, EfiCpuIoWidthUint64);
396 return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
587 return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
616 return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
/vbox/src/VBox/Devices/EFI/Firmware/MdePkg/Library/DxeIoLibEsal/
H A DIoLib.c367 return IoReadWorker (Port, EfiCpuIoWidthUint64);
396 return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);
577 return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);
604 return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);
/vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkModulePkg/Universal/CpuIoDxe/
H A DCpuIo.c43 8, // EfiCpuIoWidthUint64
61 8, // EfiCpuIoWidthUint64
78 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
135 if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
193 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
197 or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
260 } else if (OperationWidth == EfiCpuIoWidthUint64) {
273 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
277 or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
340 } else if (OperationWidth == EfiCpuIoWidthUint64) {
[all...]
/vbox/src/VBox/Devices/EFI/Firmware/UefiCpuPkg/CpuIo2Dxe/
H A DCpuIo2Dxe.c43 8, // EfiCpuIoWidthUint64
61 8, // EfiCpuIoWidthUint64
78 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
135 if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) {
193 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
197 or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
260 } else if (OperationWidth == EfiCpuIoWidthUint64) {
273 EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
277 or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
340 } else if (OperationWidth == EfiCpuIoWidthUint64) {
[all...]
/vbox/src/VBox/Devices/EFI/Firmware/OvmfPkg/BlockMmioToBlockIoDxe/
H A DBlockIo.c146 EfiCpuIoWidthUint64,

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