Searched refs:Cache (Results 1 - 25 of 26) sorted by relevance

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/vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/
H A DIsaFloppyBlock.c300 if (FdcDev->Cache != NULL) {
303 CopyMem ((UINT8 *) Buffer, (UINT8 *) FdcDev->Cache, BlockSize);
349 // Cache the data read
351 if (Lba0 == 0 && FdcDev->Cache == NULL) {
352 FdcDev->Cache = AllocateCopyPool (BlockSize, Buffer);
371 if (FdcDev->Cache != NULL) {
372 FreePool (FdcDev->Cache);
373 FdcDev->Cache = NULL;
H A DIsaFloppy.c244 FdcDev->Cache = NULL;
H A DIsaFloppy.h80 UINT8 *Cache; member in struct:__anon10292
/vbox/src/VBox/Devices/EFI/Firmware/IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/
H A DAtapi.c1749 if (IdeBlkIoDevice->Cache != NULL) {
1750 gBS->FreePool (IdeBlkIoDevice->Cache);
1751 IdeBlkIoDevice->Cache = NULL;
1766 if (IdeBlkIoDevice->Cache != NULL) {
1767 gBS->FreePool (IdeBlkIoDevice->Cache);
1768 IdeBlkIoDevice->Cache = NULL;
1776 if (IdeBlkIoDevice->Cache != NULL) {
1777 gBS->FreePool (IdeBlkIoDevice->Cache);
1778 IdeBlkIoDevice->Cache = NULL;
1815 if (Lba == 0 && (IdeBlkIoDevice->Cache
[all...]
H A DIdeBus.h100 UINT8 *Cache; member in struct:__anon10341
H A DIde.c1183 if (IdeBlkIoDevice->Cache != NULL) {
1184 gBS->FreePool (IdeBlkIoDevice->Cache);
1185 IdeBlkIoDevice->Cache = NULL;
/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal/Network/Ip4Dxe/
H A DIp4Route.c213 Ip4InitRouteCache (&RtTable->Cache);
253 Ip4CleanRouteCache (&RtTable->Cache);
390 Ip4PurgeRouteCache (&RtTable->Cache, (UINTN) RtEntry);
430 NET_LIST_FOR_EACH (Entry, &RtTable->Cache.CacheBucket[Index]) {
513 IP4_ROUTE_CACHE_ENTRY *Cache; local
520 Head = &RtTable->Cache.CacheBucket[IP4_ROUTE_CACHE_HASH (Dest, Src)];
578 Cache = NET_LIST_USER_STRUCT (Entry, IP4_ROUTE_CACHE_ENTRY, Link);
581 Ip4FreeRouteCacheEntry (Cache);
H A DIp4Route.h88 IP4_ROUTE_CACHE Cache; member in struct:_IP4_ROUTE_TABLE
/vbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/Ip6Dxe/
H A DIp6Route.c242 NET_LIST_FOR_EACH (Entry, &RtTable->Cache.CacheBucket[Index]) {
354 InitializeListHead (&RtTable->Cache.CacheBucket[Index]);
355 RtTable->Cache.CacheNum[Index] = 0;
397 NET_LIST_FOR_EACH_SAFE (Entry, Next, &RtTable->Cache.CacheBucket[Index]) {
540 Ip6PurgeRouteCache (&RtTable->Cache, (UINTN) Route);
585 ListHead = &RtTable->Cache.CacheBucket[Index];
631 RtTable->Cache.CacheNum[Index]++;
H A DIp6Route.h66 IP6_ROUTE_CACHE Cache; member in struct:_IP6_ROUTE_TABLE
H A DIp6Nd.c742 // Update the Destination Cache - all entries using the time-out router as next-hop
1420 // Create a Neighbor Cache entry in the INCOMPLETE state when performing
1777 // Search the Neighbor Cache for the target's entry. If no entry exists,
1827 // If the target's Neighbor Cache entry is in INCOMPLETE state and no
1835 // Update the Neighbor Cache
1883 // Default Router List and remove the Destination Cache entries for all destinations
2570 InsertHeadList (&IpSb->RouteTable->Cache.CacheBucket[Index], &RouteCache->Link);
3139 while (IpSb->RouteTable->Cache.CacheNum[Index] > IP6_ROUTE_CACHE_MAX) {
3140 Entry = NetListRemoveTail (&IpSb->RouteTable->Cache.CacheBucket[Index]);
3147 ASSERT (IpSb->RouteTable->Cache
[all...]
/vbox/src/VBox/Devices/EFI/Firmware/NetworkPkg/UefiPxeBcDxe/
H A DPxeBcBoot.c68 PXEBC_DHCP_PACKET_CACHE *Cache; local
85 Cache = Mode->ProxyOfferReceived ? &Private->ProxyOffer : &Private->DhcpAck;
86 OfferType = Mode->UsingIpv6 ? Cache->Dhcp6.OfferType : Cache->Dhcp4.OfferType;
100 VendorOpt = &Cache->Dhcp4.VendorOpt;
263 PXEBC_DHCP_PACKET_CACHE *Cache; local
283 Cache = Mode->ProxyOfferReceived ? &Private->ProxyOffer : &Private->DhcpAck;
284 OfferType = Mode->UsingIpv6 ? Cache->Dhcp6.OfferType : Cache->Dhcp4.OfferType;
292 VendorOpt = &Cache
[all...]
/vbox/src/VBox/VMM/VMMR3/
H A DPDMBlkCache.cpp3 * PDM Block Cache.
18 /** @page pg_pdm_block_cache PDM Block Cache - The I/O cache
39 # define PDMACFILECACHE_IS_CRITSECT_OWNER(Cache) \
42 AssertMsg(RTCritSectIsOwner(&Cache->CritSect), \
61 # define PDMACFILECACHE_IS_CRITSECT_OWNER(Cache) do { } while (0)
398 STAM_PROFILE_ADV_START(&pCache->StatTreeRemove, Cache);
400 STAM_PROFILE_ADV_STOP(&pCache->StatTreeRemove, Cache);
411 STAM_PROFILE_ADV_START(&pCache->StatTreeRemove, Cache);
413 STAM_PROFILE_ADV_STOP(&pCache->StatTreeRemove, Cache);
423 STAM_PROFILE_ADV_START(&pCache->StatTreeRemove, Cache);
[all...]
/vbox/src/VBox/Devices/EFI/Firmware/ShellPkg/Library/UefiShellDebug1CommandsLib/Edit/
H A DFileBuffer.c1431 CHAR8 *Cache; local
1512 Cache = AllocateZeroPool (TotalSize);
1513 if (Cache == NULL) {
1524 Ptr = Cache;
1553 Status = ShellWriteFile (FileHandle, &Size, Cache);
1556 FreePool (Cache);
1559 Ptr = Cache;
1596 Status = ShellWriteFile (FileHandle, &Size, Cache);
1599 FreePool (Cache);
1604 FreePool (Cache);
[all...]
/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal/Variable/EmuRuntimeDxe/
H A DEmuVariable.c281 A read that hits in the cache will have Read and Cache true for
291 @param[in] Cache TRUE for a cache hit.
302 IN BOOLEAN Cache
344 if (Cache) {
/vbox/src/VBox/Devices/EFI/Firmware/VBoxPkg/VBoxVariable/
H A DEmuVariable.c320 A read that hits in the cache will have Read and Cache true for
330 @param[in] Cache TRUE for a cache hit.
341 IN BOOLEAN Cache
383 if (Cache) {
/vbox/src/VBox/Devices/Graphics/shaderlib/wine/include/
H A Doleidl.h1803 virtual HRESULT STDMETHODCALLTYPE Cache(
1840 HRESULT (STDMETHODCALLTYPE *Cache)( member in struct:IOleCacheVtbl
1876 #define IOleCache_Cache(This,pformatetc,advf,pdwConnection) (This)->lpVtbl->Cache(This,pformatetc,advf,pdwConnection)
1991 HRESULT (STDMETHODCALLTYPE *Cache)( member in struct:IOleCache2Vtbl
2038 #define IOleCache2_Cache(This,pformatetc,advf,pdwConnection) (This)->lpVtbl->Cache(This,pformatetc,advf,pdwConnection)
H A Doleidl.idl472 HRESULT Cache(
/vbox/src/VBox/Additions/WINNT/Graphics/Wine/include/
H A Doleidl.h1803 virtual HRESULT STDMETHODCALLTYPE Cache(
1840 HRESULT (STDMETHODCALLTYPE *Cache)( member in struct:IOleCacheVtbl
1876 #define IOleCache_Cache(This,pformatetc,advf,pdwConnection) (This)->lpVtbl->Cache(This,pformatetc,advf,pdwConnection)
1991 HRESULT (STDMETHODCALLTYPE *Cache)( member in struct:IOleCache2Vtbl
2038 #define IOleCache2_Cache(This,pformatetc,advf,pdwConnection) (This)->lpVtbl->Cache(This,pformatetc,advf,pdwConnection)
H A Doleidl.idl472 HRESULT Cache(
/vbox/src/VBox/Devices/EFI/Firmware/MdeModulePkg/Universal/Variable/RuntimeDxe/
H A DVariable.c39 A read that hits in the cache will have Read and Cache true for
49 @param[in] Cache TRUE for a cache hit.
60 IN BOOLEAN Cache
100 if (Cache) {
/vbox/src/VBox/Devices/EFI/Firmware/SecurityPkg/VariableAuthenticated/RuntimeDxe/
H A DVariable.c39 A read that hits in the cache will have Read and Cache true for
49 @param[in] Cache TRUE for a cache hit.
60 IN BOOLEAN Cache
100 if (Cache) {
1526 // Cache the previous variable data into StorageArea.
/vbox/src/VBox/Devices/EFI/Firmware/SecurityPkg/VariableAuthenticated/EsalVariableDxeSal/
H A DVariable.c40 // a Cache you would need a cache that improves the search performance for a variable.
693 A read that hits in the cache will have Read and Cache true for
703 @param[in] Cache TRUE for a cache hit.
714 IN BOOLEAN Cache
762 if (Cache) {
/vbox/src/VBox/Devices/PC/ipxe/src/util/
H A Dniclist.pl41 --pci-file Cache file for downloaded pci.ids
/vbox/src/VBox/Main/webservice/jaxlibs/
H A Djaxb-api.jarMETA-INF/ META-INF/MANIFEST.MF javax/ javax/xml/ javax/xml/bind/ javax/xml/bind/annotation/ ...

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