Searched refs:simd_prefix_and_encode (Results 1 - 2 of 2) sorted by relevance

/openjdk7/hotspot/src/cpu/x86/vm/
H A Dassembler_x86.hpp630 int simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src,
635 int simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, Register src, function in class:Assembler
638 // since only encoding is used in simd_prefix_and_encode() and number of
640 return simd_prefix_and_encode(dst, nds, as_XMMRegister(src->encoding()), pre);
642 int simd_prefix_and_encode(XMMRegister dst, Register src, VexSimdPrefix pre) { function in class:Assembler
643 return simd_prefix_and_encode(dst, xnoreg, src, pre);
645 int simd_prefix_and_encode(Register dst, XMMRegister src, function in class:Assembler
647 return simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, pre, opc);
654 return simd_prefix_and_encode(dst, nds, as_XMMRegister(src->encoding()), pre, VEX_OPCODE_0F, rex_w);
662 return simd_prefix_and_encode(as_XMMRegiste
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H A Dassembler_x86.cpp1030 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38);
1045 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38);
1060 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38);
1075 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_66, VEX_OPCODE_0F_38);
1310 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_F2);
1322 int encode = simd_prefix_and_encode(dst, dst, src, VEX_SIMD_F3);
1345 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_F2);
1352 int encode = simd_prefix_and_encode(dst, src, VEX_SIMD_F3);
1628 int encode = simd_prefix_and_encode(dst, src, src, VEX_SIMD_NONE);
1661 int encode = simd_prefix_and_encode(ds
4255 int Assembler::simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) { function in class:Assembler
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