Searched refs:rex_w (Results 1 - 2 of 2) sorted by relevance

/openjdk7/hotspot/src/cpu/x86/vm/
H A Dassembler_x86.hpp580 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
582 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
614 bool rex_w = false, bool vector256 = false);
626 bool rex_w = true; local
627 simd_prefix(dst, nds, src, pre, VEX_OPCODE_0F, rex_w);
632 bool rex_w = false, bool vector256 = false);
653 bool rex_w = true; local
654 return simd_prefix_and_encode(dst, nds, as_XMMRegister(src->encoding()), pre, VEX_OPCODE_0F, rex_w);
661 bool rex_w = true; local
662 return simd_prefix_and_encode(as_XMMRegister(dst->encoding()), xnoreg, src, pre, opc, rex_w);
[all...]
H A Dassembler_x86.cpp4170 void Assembler::rex_prefix(Address adr, XMMRegister xreg, VexSimdPrefix pre, VexOpcode opc, bool rex_w) { argument
4174 if (rex_w) {
4188 int Assembler::rex_prefix_and_encode(int dst_enc, int src_enc, VexSimdPrefix pre, VexOpcode opc, bool rex_w) { argument
4192 int encode = (rex_w) ? prefixq_and_encode(dst_enc, src_enc) :
4244 void Assembler::simd_prefix(XMMRegister xreg, XMMRegister nds, Address adr, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) { argument
4248 vex_prefix(adr, nds_enc, xreg_enc, pre, opc, rex_w, vector256);
4251 rex_prefix(adr, xreg, pre, opc, rex_w);
4255 int Assembler::simd_prefix_and_encode(XMMRegister dst, XMMRegister nds, XMMRegister src, VexSimdPrefix pre, VexOpcode opc, bool rex_w, bool vector256) { argument
4260 return vex_prefix_and_encode(dst_enc, nds_enc, src_enc, pre, opc, rex_w, vector256);
4263 return rex_prefix_and_encode(dst_enc, src_enc, pre, opc, rex_w);
[all...]

Completed in 91 milliseconds