Searched refs:tlb (Results 1 - 8 of 8) sorted by relevance

/illumos-gate/usr/src/cmd/fm/eversholt/files/i386/i86pc/
H A Dgcpu.esc113 CMPND_EVENT(tlb);
189 CMPND_FLT_PROP_1(tlb, tlb, 12, 72h);
H A Dintel.esc102 CMPND_EVENT(tlb, 1s);
179 CMPND_FLT_PROP_1(tlb, tlb, 12, 72h);
/illumos-gate/usr/src/uts/i86pc/vm/
H A Dhat_i86.h233 x86pte_t old_pte, void *pte_ptr, boolean_t tlb);
H A Dhtable.h277 x86pte_t old, x86pte_t *ptr, boolean_t tlb);
H A Dhtable.c2229 * If tlb is set, also invalidates any TLB entries.
2239 boolean_t tlb)
2288 if (tlb && (oldpte & (PT_REF | PT_MOD)))
2234 x86pte_inval( htable_t *ht, uint_t entry, x86pte_t expect, x86pte_t *pte_ptr, boolean_t tlb) argument
H A Dhat_i86.c146 * AMD shanghai processors provide better management of 1gb ptes in its tlb.
148 * processors that don't have optimal tlb support for the 1g page size.
2179 boolean_t tlb)
2221 old_pte = x86pte_inval(ht, entry, old_pte, pte_ptr, tlb);
2440 * as indicated by the tlb=FALSE argument to hat_pte_unmap().
2173 hat_pte_unmap( htable_t *ht, uint_t entry, uint_t flags, x86pte_t old_pte, void *pte_ptr, boolean_t tlb) argument
/illumos-gate/usr/src/boot/sys/boot/sparc64/loader/
H A Dmain.c69 #include <machine/tlb.h>
372 dtlb_get_data_sun4u(u_int tlb, u_int slot) argument
376 slot = TLB_DAR_SLOT(tlb, slot);
390 itlb_get_data_sun4u(u_int tlb, u_int slot) argument
394 slot = TLB_DAR_SLOT(tlb, slot);
411 u_int i, tlb; local
/illumos-gate/usr/src/cmd/trapstat/sun4/
H A Dtrapstat.c577 tlbdata(tstat_tlbdata_t *tlb, tstat_tlbdata_t *otlb) argument
579 missdata(&tlb->ttlb_tlb, &otlb->ttlb_tlb);
580 missdata(&tlb->ttlb_tsb, &otlb->ttlb_tsb);

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