Searched refs:reserve_threshold (Results 1 - 8 of 8) sorted by relevance

/illumos-gate/usr/src/uts/common/io/xge/hal/include/
H A Dxgehal-channel.h294 * @reserve_threshold: Reserve threshold. Minimal number of free descriptors
296 * Note that @reserve_threshold >= 0 &&
297 * @reserve_threshold < @reserve_max.
373 int reserve_threshold; member in struct:__anon6597
421 int reserve_initial, int reserve_max, int reserve_threshold);
H A Dxgehal-config.h260 * @reserve_threshold: Descriptor reservation threshold.
261 * At least @reserve_threshold descriptors will remain
283 int reserve_threshold; member in struct:xge_hal_fifo_config_t
/illumos-gate/usr/src/uts/common/io/xge/hal/xgehal/
H A Dxgehal-channel-fp.c41 channel->reserve_threshold) {
68 channel->reserve_threshold) {
204 channel->reserve_threshold);
H A Dxgehal-channel.c169 int reserve_initial, int reserve_max, int reserve_threshold)
187 channel->reserve_threshold = reserve_threshold;
167 __hal_channel_initialize(xge_hal_channel_h channelh, xge_hal_channel_attr_t *attr, void **reserve_arr, int reserve_initial, int reserve_max, int reserve_threshold) argument
H A Dxgehal-config.c177 if (new_queue->max < new_config->reserve_threshold) {
383 if ((new_config->reserve_threshold <
385 (new_config->reserve_threshold >
H A Dxgehal-fifo.c268 fifo->config->reserve_threshold);
275 "max_frags:%d reserve_threshold:%d\n"
278 fifo->config->max_frags, fifo->config->reserve_threshold,
H A Dxgehal-mgmtaux.c1308 xge_os_strlcpy(dest_addr, "reserve_threshold", dest_size);
1309 __HAL_AUX_ENTRY(key, channel->reserve_threshold, "%u");
1359 xge_os_strlcpy(dest_addr, "reserve_threshold", dest_size);
1360 __HAL_AUX_ENTRY(key, channel->reserve_threshold, "%u");
1704 dev_config->fifo.reserve_threshold, "%u");
/illumos-gate/usr/src/uts/common/io/xge/drv/
H A Dxge.c692 device_config->fifo.reserve_threshold = ddi_prop_get_int(DDI_DEV_T_ANY,

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