Searched refs:mask0 (Results 1 - 8 of 8) sorted by relevance

/illumos-gate/usr/src/uts/common/io/hxge/
H A Dhxge_pfc.h232 #define mask0 mask.regs.reg0 macro
H A Dhpi_pfc.c96 WRITE_TCAM_REG_MASK0(handle, tcam_ptr->mask0);
621 WRITE_TCAM_REG_MASK0(handle, tcam_ptr->mask0);
630 tcam_ptr->mask0, tcam_ptr->mask1));
H A Dhxge_pfc.c96 tcam_rdptr.mask0, tcam_rdptr.mask1, asc_ram));
/illumos-gate/usr/src/uts/common/io/cxgbe/common/
H A Dcommon.h435 u64 mask0, u64 mask1, unsigned int crc, bool enable);
H A Dt4_hw.c3634 * @mask0: byte mask for bytes 0-63 of a packet
3640 * specified in @mask0/@mask1 in received packets and compare the CRC of
3646 u64 mask0, u64 mask1, unsigned int crc, bool enable)
3660 t4_write_reg(adap, EPIO_REG(DATA1), mask0 >> 32);
3669 t4_write_reg(adap, EPIO_REG(DATA0), mask0);
3645 t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map, u64 mask0, u64 mask1, unsigned int crc, bool enable) argument
/illumos-gate/usr/src/uts/common/io/nxge/npi/
H A Dnpi_fflp.c350 WRITE_TCAM_REG_MASK0(handle, tcam_ptr->mask0);
419 READ_TCAM_REG_MASK0(handle, &tcam_ptr->mask0);
457 WRITE_TCAM_REG_MASK0(handle, tcam_ptr->mask0);
473 tcam_ptr->mask0, tcam_ptr->mask1,
/illumos-gate/usr/src/uts/common/sys/nxge/
H A Dnxge_fflp_hw.h1267 #define mask0 mask.regs_e.reg0 macro
/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_fflp.c115 tcam_rdptr.mask0, tcam_rdptr.mask1,

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