Searched refs:hccr (Results 1 - 7 of 7) sorted by relevance

/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_init.c289 WRT16_IO_REG(ha, hccr, HC_PAUSE_RISC);
291 if ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) !=
311 WRT16_IO_REG(ha, hccr, HC_RELEASE_RISC);
313 if ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) ==
2276 RD16_IO_REG(ha, hccr),
3567 WRT16_IO_REG(ha, hccr, HC_PAUSE_RISC);
3569 if ((RD16_IO_REG(ha, hccr) & HC_RISC_PAUSE) != 0) {
3616 WRT16_IO_REG(ha, hccr, HC_RESET_RISC);
3622 WRT16_IO_REG(ha, hccr, HC_RELEASE_RISC);
3625 WRT16_IO_REG(ha, hccr, HC_CLR_RISC_IN
[all...]
H A Dql_isr.c213 WRT16_IO_REG(ha, hccr,
324 WRT16_IO_REG(ha, hccr, HC_CLR_RISC_INT);
489 WRT32_IO_REG(ha, hccr,
492 WRT16_IO_REG(ha, hccr, HC_CLR_RISC_INT);
508 mbx = RD16_IO_REG(ha, hccr); /* PCI posting */
568 hccr_reg = RD16_IO_REG(ha, hccr);
581 "Pause Error - hccr=%xh, stat=%xh, count=%d",
611 EL(ha, "UNKNOWN interrupt status=%xh, hccr=%xh\n",
645 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT);
647 WRT16_IO_REG(ha, hccr, HC_CLR_RISC_IN
[all...]
H A Dql_api.c308 0xc0, /* hccr */
353 0xc0, /* hccr */
398 0x48, /* hccr */
443 0x48, /* hccr */
2269 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT);
2271 WRT32_IO_REG(ha, hccr, HC24_SET_HOST_INT);
2276 WRT32_IO_REG(ha, hccr,
2280 WRT32_IO_REG(ha, hccr, HC24_CLR_RISC_INT);
2297 WRT16_IO_REG(ha, hccr, HC_RESET_RISC);
2299 WRT16_IO_REG(ha, hccr, HC_RELEASE_RIS
[all...]
H A Dql_mbx.c159 WRT32_IO_REG(ha, hccr, HC24_SET_HOST_INT);
161 WRT16_IO_REG(ha, hccr, HC_SET_HOST_INT);
/illumos-gate/usr/src/uts/common/sys/fibre-channel/fca/qlc/
H A Dql_init.h752 uint32_t hccr; member in struct:ql_24xx_fw_dump
H A Dql_api.h480 uint16_t hccr; /* Host command & control register. */ member in struct:__anon7767
/illumos-gate/usr/src/cmd/mdb/common/modules/qlc/
H A Dqlc.c2127 mdb_printf("\nHCCR Register\n%08x\n", fw->hccr);

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