Searched refs:ecr (Results 1 - 9 of 9) sorted by relevance

/illumos-gate/usr/src/uts/common/sys/
H A Decppreg.h152 uint8_t ecr; member in struct:fifo_reg
H A Decppvar.h416 (pp->noecpregs) ? 0xff : PP_GETB((pp)->f_handle, &(pp)->f_reg->ecr)
425 if (!pp->noecpregs) PP_PUTB((pp)->f_handle, &(pp)->f_reg->ecr, val)
/illumos-gate/usr/src/uts/common/io/rtw/
H A Drtw.c379 uint8_t ecr; local
380 ecr = RTW_READ8(regs, RTW_9346CR);
381 ecr &= ~(RTW_9346CR_EEM_MASK | RTW_9346CR_EECS | RTW_9346CR_EESK);
383 ecr |= RTW_9346CR_EEM_CONFIG;
386 ecr |= RTW_9346CR_EEM_NORMAL;
388 RTW_WRITE8(regs, RTW_9346CR, ecr);
569 uint8_t ecr; local
571 ecr = RTW_READ8(regs, RTW_9346CR);
572 ecr = (ecr
795 uint8_t ecr; local
[all...]
/illumos-gate/usr/src/uts/common/io/
H A Decpp.c1121 "ecpp_open: mode=%x, phase=%x ecr=%x, dsr=%x, dcr=%x\n",
1220 ecpp_error(pp->dip, "ecpp_close: ecr=%x, dsr=%x, dcr=%x\n",
2548 uint8_t ecr, dcr; local
2669 ecr = ECR_READ(pp);
2670 if (!(ecr & ECPP_FIFO_EMPTY)) {
2673 ECR_WRITE(pp, ecr);
2717 "ecpp_start:current_mode=%x,current_phase=%x,ecr=%x,len=%d\n",
2859 ecpp_error(pp->dip, "ecpp_prep_pio_xfer: dcr=%x ecr=%x\n",
2878 uint8_t ecr; local
2929 ecr
3808 uint8_t ecr; local
5689 uint8_t ecr; local
5987 uint8_t ecr; local
6033 uint8_t ecr; local
[all...]
/illumos-gate/usr/src/uts/common/io/ib/adapters/tavor/
H A Dtavor_event.c562 uint64_t *ecr, *clr_int; local
577 ecr = state->ts_cmd_regs.ecr;
585 ecrreg = ddi_get64(state->ts_reg_cmdhdl, ecr);
619 ecrreg = ddi_get64(state->ts_reg_cmdhdl, ecr);
H A Dtavor.c1229 /* Setup Tavor Event Cause Register (ecr and clr_ecr) */
1230 state->ts_cmd_regs.ecr = (uint64_t *)
/illumos-gate/usr/src/uts/common/sys/ib/adapters/tavor/
H A Dtavor.h327 uint64_t *ecr; member in struct:tavor_cmd_reg_s
/illumos-gate/usr/src/uts/intel/io/vmxnet3s/
H A Dvmxnet3_defs.h578 uint32_t ecr; member in struct:Vmxnet3_DriverShared
H A Dvmxnet3_main.c1090 uint32_t events = ds->ecr;

Completed in 82 milliseconds