Searched refs:chip_mask (Results 1 - 5 of 5) sorted by relevance

/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dhw_debug.h94 #define IDLE_CHK_CHIP_MASK_CHK(chip_mask) \
111 if (var_chip_mask & chip_mask) { \
116 #define IDLE_CHK_1(chip_mask, offset, condition, severity, fail_msg) \
117 IDLE_CHK_CHIP_MASK_CHK(chip_mask); \
127 #define IDLE_CHK_2(chip_mask, offset, loop, inc, condition, severity, fail_msg) \
128 IDLE_CHK_CHIP_MASK_CHK(chip_mask); \
140 #define IDLE_CHK_3(chip_mask, offset1, offset2, condition, severity, fail_msg) \
141 IDLE_CHK_CHIP_MASK_CHK(chip_mask); \
151 #define IDLE_CHK_4(chip_mask, offset1, offset2, loop, inc, condition, severity, fail_msg) \
152 IDLE_CHK_CHIP_MASK_CHK(chip_mask); \
[all...]
/illumos-gate/usr/src/uts/sun4u/io/px/
H A Dpx_err.h57 void px_err_reg_setup_pcie(uint8_t chip_mask, caddr_t csr_base,
H A Dpx_err_impl.h54 * chip_mask mask of chip types supporting this error register
74 uint8_t chip_mask; member in struct:px_err_reg_desc
H A Dpx_err.c599 /* Bits in chip_mask, set according to type. */
782 px_err_reg_setup_pcie(uint8_t chip_mask, caddr_t csr_base, boolean_t enable) argument
795 if ((reg_desc_p->chip_mask & chip_mask) &&
869 uint8_t chip_mask = 1 << PX_CHIP_TYPE(pxu_p); local
874 if (!(reg_desc_p->chip_mask & chip_mask))
933 if (!(BIT_TST(err_reg_tbl->chip_mask, PX_CHIP_TYPE(pxu_p))))
H A Dpx_lib4u.c185 uint8_t chip_mask; local
197 chip_mask = BITMASK(chip_type);
266 px_err_reg_setup_pcie(chip_mask, csr_base, PX_ERR_ENABLE);
270 px_err_reg_setup_pcie(chip_mask, csr_base, PX_ERR_ENABLE);
294 uint8_t chip_mask; local
306 chip_mask = BITMASK(PX_CHIP_TYPE(pxu_p));
308 px_err_reg_setup_pcie(chip_mask, csr_base, PX_ERR_DISABLE);

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