Searched refs:__xge_os_cacheline_size (Results 1 - 2 of 2) sorted by relevance

/illumos-gate/usr/src/uts/common/io/xge/hal/xgehal/
H A Dxgehal-fifo.c228 fifo->priv_size = ((fifo->priv_size + __xge_os_cacheline_size -1) /
229 __xge_os_cacheline_size) *
230 __xge_os_cacheline_size;
234 txdl_size = ((fifo->txdl_size + __xge_os_cacheline_size - 1) /
235 __xge_os_cacheline_size) * __xge_os_cacheline_size;
240 __xge_os_cacheline_size);
/illumos-gate/usr/src/uts/common/io/xge/drv/
H A Dxge_osdep.h214 #define __xge_os_cacheline_size 64 /* L1-cache line size: x86_64 */ macro
216 #define __xge_os_cacheline_size 64 /* L1-cache line size: sparcv9 */ macro
221 __attribute__((__aligned__(__xge_os_cacheline_size)))

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